Merge pull request #766 from stm32-rs/unsafe

rm unused unused_unsafe

Author: burrbull

src/flash.rs

@@ -2,6 +2,7 @@ use embedded_storage::nor_flash::{
     ErrorType, MultiwriteNorFlash, NorFlash, NorFlashError, NorFlashErrorKind, ReadNorFlash,
 };
 
+use crate::pac::flash::cr::PSIZE;
 use crate::pac::FLASH;
 use crate::signature::FlashSize;
 use core::{ptr, slice};
@@ -101,8 +102,6 @@ impl FlashExt for FLASH {
     }
 }
 
-const PSIZE_X8: u8 = 0b00;
-
 /// Read-only flash
 ///
 /// # Examples
@@ -196,13 +195,14 @@ impl UnlockedFlash<'_> {
     pub fn erase(&mut self, sector: u8) -> Result<(), Error> {
         let snb = if sector < 12 { sector } else { sector + 4 };
 
-        #[rustfmt::skip]
-        self.flash.cr().modify(|_, w| unsafe {
+        self.flash.cr().modify(|_, w| {
             // start
             w.strt().set_bit();
-            w.psize().bits(PSIZE_X8);
+            w.psize().variant(PSIZE::Psize8);
             // sector number
-            w.snb().bits(snb);
+            unsafe {
+                w.snb().bits(snb);
+            }
             // sectore erase
             w.ser().set_bit();
             // no programming
@@ -224,10 +224,8 @@ impl UnlockedFlash<'_> {
             bytes_written = 0;
             let amount = 16 - (offset % 16);
 
-            #[rustfmt::skip]
-            #[allow(unused_unsafe)]
-            self.flash.cr().modify(|_, w| unsafe {
-                w.psize().bits(PSIZE_X8);
+            self.flash.cr().modify(|_, w| {
+                w.psize().variant(PSIZE::Psize8);
                 // no sector erase
                 w.ser().clear_bit();
                 // programming
@@ -265,7 +263,6 @@ impl UnlockedFlash<'_> {
 const UNLOCK_KEY1: u32 = 0x45670123;
 const UNLOCK_KEY2: u32 = 0xCDEF89AB;
 
-#[allow(unused_unsafe)]
 fn unlock(flash: &FLASH) {
     flash.keyr().write(|w| unsafe { w.key().bits(UNLOCK_KEY1) });
     flash.keyr().write(|w| unsafe { w.key().bits(UNLOCK_KEY2) });

src/qei.rs

@@ -105,11 +105,7 @@ macro_rules! hal {
         impl Instance for $TIM {
             fn setup_qei(&mut self) {
                 // Configure TxC1 and TxC2 as captures
-                #[cfg(not(feature = "gpio-f410"))]
                 self.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());
-                #[cfg(feature = "gpio-f410")]
-                self.ccmr1_input()
-                    .write(|w| unsafe { w.cc1s().bits(0b01).cc2s().bits(0b01) });
                 // enable and configure to capture on rising edge
                 self.ccer().write(|w| {
                     w.cc1e().set_bit().cc1p().clear_bit();

src/qspi.rs

@@ -381,14 +381,11 @@ impl<BANK: QspiPins> Qspi<BANK> {
         while self.qspi.sr().read().busy().bit_is_set() {}
 
         self.qspi.cr().modify(|_, w| unsafe {
-            w.prescaler()
-                .bits(config.clock_prescaler)
-                .sshift()
-                .bit(config.sample_shift == SampleShift::HalfACycle)
-                .fsel()
-                .bit(BANK::FSEL)
-                .dfm()
-                .bit(BANK::DFM)
+            w.prescaler().bits(config.clock_prescaler);
+            w.sshift()
+                .bit(config.sample_shift == SampleShift::HalfACycle);
+            w.fsel().bit(BANK::FSEL);
+            w.dfm().bit(BANK::DFM)
         });
         while self.is_busy() {}
 

src/sdio.rs

@@ -352,7 +352,6 @@ impl<P: SdioPeripheral> Sdio<P> {
         self.sdio.dlen().write(|w| w.datalength().set(length_bytes));
         // Transfer
         self.sdio.dctrl().write(|w| {
-            #[allow(unused_unsafe)]
             unsafe {
                 w.dblocksize().bits(block_size);
             } // 2^n bytes block size

src/timer.rs

@@ -474,9 +474,7 @@ macro_rules! hal {
             }
             #[inline(always)]
             fn write_count(&mut self, value:Self::Width) {
-                //TODO: remove "unsafe" when possible
-                #[allow(unused_unsafe)]
-                self.cnt().write(|w|unsafe{w.cnt().bits(value)});
+                self.cnt().write(|w| unsafe { w.cnt().bits(value) });
             }
             #[inline(always)]
             fn start_one_pulse(&mut self) {
@@ -517,7 +515,6 @@ macro_rules! hal {
                 fn set_cc_value(c: u8, value: u32) {
                     let tim = unsafe { &*<$TIM>::ptr() };
                     if c < Self::CH_NUMBER {
-                        #[allow(unused_unsafe)]
                         tim.ccr(c as usize).write(|w| unsafe { w.bits(value) })
                     }
                 }

src/timer/pwm_input.rs

@@ -75,7 +75,6 @@ macro_rules! hal {
             /// 1. When a new cycle is started: the duty cycle will be `1.00`
             /// 2. When the period is captured. the duty cycle will be an observable value.
             /// See the pwm input example for an suitable interrupt handler.
-            #[allow(unused_unsafe)] //for some chips the operations are considered safe.
             pub fn pwm_input(
                 mut self,
                 best_guess: Hertz,