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First part of advanced timer dead time feature documentation
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src/timer/pwm.rs

Lines changed: 23 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -370,36 +370,44 @@ where
370370
TIM: Instance + WithPwm,
371371
PINS: Pins<TIM, P>,
372372
{
373+
/// Enable PWM output of the timer on channel `channel`
373374
#[inline]
374375
pub fn enable(&mut self, channel: Channel) {
375376
TIM::enable_channel(PINS::check_used(channel) as u8, true)
376377
}
377378

379+
/// Disable PWM output of the timer on channel `channel`
378380
#[inline]
379381
pub fn disable(&mut self, channel: Channel) {
380382
TIM::enable_channel(PINS::check_used(channel) as u8, false)
381383
}
382384

385+
/// Set the polarity of the active state for the primary PWM output of the timer on channel `channel`
383386
#[inline]
384387
pub fn set_polarity(&mut self, channel: Channel, p: Polarity) {
385388
TIM::set_channel_polarity(PINS::check_used(channel) as u8, p);
386389
}
387390

391+
/// Get the current duty cycle of the timer on channel `channel`
388392
#[inline]
389393
pub fn get_duty(&self, channel: Channel) -> u16 {
390394
TIM::read_cc_value(PINS::check_used(channel) as u8) as u16
391395
}
392396

397+
/// Set the duty cycle of the timer on channel `channel`
393398
#[inline]
394399
pub fn set_duty(&mut self, channel: Channel, duty: u16) {
395400
TIM::set_cc_value(PINS::check_used(channel) as u8, duty as u32)
396401
}
397402

403+
/// Get the maximum duty cycle value of the timer
404+
///
398405
/// If `0` returned means max_duty is 2^16
399406
pub fn get_max_duty(&self) -> u16 {
400407
(TIM::read_auto_reload() as u16).wrapping_add(1)
401408
}
402409

410+
/// Get the PWM frequency of the timer in Hertz
403411
pub fn get_period(&self) -> Hertz {
404412
let clk = self.clk;
405413
let psc = self.tim.read_prescaler() as u32;
@@ -409,6 +417,7 @@ where
409417
clk / ((psc + 1) * (arr + 1))
410418
}
411419

420+
/// Set the PWM frequency for the timer in Hertz
412421
pub fn set_period(&mut self, period: Hertz) {
413422
let clk = self.clk;
414423

@@ -418,6 +427,7 @@ where
418427
self.tim.cnt_reset();
419428
}
420429

430+
/// Set the polarity of the active state for the complementary PWM output of the advanced timer on channel `channel`
421431
#[inline]
422432
pub fn set_complementary_polarity(&mut self, channel: Channel, p: Polarity) {
423433
TIM::set_channel_polarity(PINS::check_complementary_used(channel) as u8, p);
@@ -429,30 +439,39 @@ where
429439
TIM: Instance + WithPwm + Advanced,
430440
PINS: Pins<TIM, P>,
431441
{
442+
/// Enable complementary PWM output of the timer on channel `channel`
432443
#[inline]
433444
pub fn enable_complementary(&mut self, channel: Channel) {
434445
TIM::enable_nchannel(PINS::check_complementary_used(channel) as u8, true)
435446
}
436447

448+
/// Disable complementary PWM output of the timer on channel `channel`
437449
#[inline]
438450
pub fn disable_complementary(&mut self, channel: Channel) {
439451
TIM::enable_nchannel(PINS::check_complementary_used(channel) as u8, false)
440452
}
441453

442-
/// Set number DTS ticks during that complementary pin is `dead`
454+
/// Set number DTS ticks during that the primary and complementary PWM pins are simultaneously forced to their inactive states
455+
/// ( see [`Polarity`] setting ) when changing PWM state. This duration when both channels are in an 'off' state is called 'dead time'.
456+
///
457+
/// This is necessary in applications like motor control or power converters to prevent the destruction of the switching elements by
458+
/// short circuit in the moment of switching.
443459
#[inline]
444460
pub fn set_dead_time(&mut self, dts_ticks: u16) {
445461
let bits = pack_ceil_dead_time(dts_ticks);
446462
TIM::set_dtg_value(bits);
447463
}
448464

449465
/// Set raw dead time (DTG) bits
466+
///
467+
/// The dead time generation is nonlinear and constrained by the DTS tick duration. DTG register configuration and calculation of
468+
/// the actual resulting dead time is described in the application note RM0368 from ST Microelectronics
450469
#[inline]
451470
pub fn set_dead_time_bits(&mut self, bits: u8) {
452471
TIM::set_dtg_value(bits);
453472
}
454473

455-
/// Return dead time for complementary pins in DTS ticks
474+
/// Return dead time for complementary pins in the unit of DTS ticks
456475
#[inline]
457476
pub fn get_dead_time(&self) -> u16 {
458477
unpack_dead_time(TIM::read_dtg_value())
@@ -464,11 +483,13 @@ where
464483
TIM::read_dtg_value()
465484
}
466485

486+
/// Set the pin idle state
467487
#[inline]
468488
pub fn set_idle_state(&mut self, channel: Channel, s: IdleState) {
469489
TIM::idle_state(PINS::check_used(channel) as u8, false, s);
470490
}
471491

492+
/// Set the complementary pin idle state
472493
#[inline]
473494
pub fn set_complementary_idle_state(&mut self, channel: Channel, s: IdleState) {
474495
TIM::idle_state(PINS::check_complementary_used(channel) as u8, true, s);

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