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Merge pull request #639 from stm32-rs/lcdpins
public fields in LcdPins
2 parents 9779446 + c373d66 commit 66beabc

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CHANGELOG.md

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@@ -12,6 +12,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Set `Speed::VeryHigh` default for FMC, SDIO & OTG_HS_ULPI pins, clean into_alternate in examples [#632]
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- Join `Serial`, `Rx`, `Tx` for `USART` and `UART` again. Make inner traits with different implementation for USART and UART. [#636]
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### Added
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### Fixed
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- map `$SpiSlave` into `SpiSlave` struct in `spi!` macro [#635]

src/fsmc_lcd/pins.rs

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@@ -153,22 +153,22 @@ pub trait DataPins: sealed::Sealed {}
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#[allow(unused)]
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pub struct DataPins16 {
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d0: alt::D0,
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d1: alt::D1,
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d2: alt::D2,
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d3: alt::D3,
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d4: alt::D4,
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d5: alt::D5,
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d6: alt::D6,
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d7: alt::D7,
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d8: alt::D8,
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d9: alt::D9,
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d10: alt::D10,
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d11: alt::D11,
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d12: alt::D12,
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d13: alt::D13,
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d14: alt::D14,
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d15: alt::D15,
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pub d0: alt::D0,
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pub d1: alt::D1,
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pub d2: alt::D2,
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pub d3: alt::D3,
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pub d4: alt::D4,
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pub d5: alt::D5,
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pub d6: alt::D6,
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pub d7: alt::D7,
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pub d8: alt::D8,
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pub d9: alt::D9,
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pub d10: alt::D10,
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pub d11: alt::D11,
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pub d12: alt::D12,
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pub d13: alt::D13,
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pub d14: alt::D14,
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pub d15: alt::D15,
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}
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impl DataPins for DataPins16 {}
@@ -221,15 +221,15 @@ impl sealed::Sealed for DataPins16 {}
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#[allow(unused)]
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pub struct LcdPins<D, AD, NE> {
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/// The 16-bit data bus
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data: D,
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pub data: D,
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/// Address pin(s) (data/command)
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address: AD,
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pub address: AD,
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/// Output enable (read enable)
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read_enable: alt::Noe,
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pub read_enable: alt::Noe,
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/// Write enable
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write_enable: alt::Nwe,
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pub write_enable: alt::Nwe,
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/// Chip select / bank enable pin(s)
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chip_select: NE,
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pub chip_select: NE,
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}
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impl<D, AD, NE> LcdPins<D, AD, NE>

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