Pin::interrupt

Author: burrbull

CHANGELOG.md

@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+- Add `Pin::interrupt()` helper method
 - Add restriction for setting pins in alternate mode (`IntoAF`), add docs
 - Explicit order for PINS, more smart aliases for peripherals
 - Add `AFn` type aliases for `Alternate<n>`

examples/stopwatch-with-ssd1306-and-interrupts.rs

@@ -95,16 +95,18 @@ fn main() -> ! {
         timer.start(1.secs()).unwrap();
         timer.listen(Event::Update);
 
+        let btn_int_num = board_btn.interrupt(); // hal::pac::Interrupt::EXTI15_10
+
         free(|cs| {
             TIMER_TIM2.borrow(cs).replace(Some(timer));
             BUTTON.borrow(cs).replace(Some(board_btn));
         });
 
         // Enable interrupts
         pac::NVIC::unpend(hal::pac::Interrupt::TIM2);
-        pac::NVIC::unpend(hal::pac::Interrupt::EXTI15_10);
+        pac::NVIC::unpend(btn_int_num);
         unsafe {
-            pac::NVIC::unmask(hal::pac::Interrupt::EXTI15_10);
+            pac::NVIC::unmask(btn_int_num);
         };
 
         let mut delay = Timer::syst(cp.SYST, &clocks).delay();

src/gpio.rs

@@ -56,9 +56,6 @@
 
 use core::marker::PhantomData;
 
-use crate::pac::EXTI;
-use crate::syscfg::SysCfg;
-
 mod alt;
 pub(crate) use alt::{Const, PinA, SetAlternate};
 mod convert;
@@ -67,6 +64,8 @@ mod partially_erased;
 pub use partially_erased::{PEPin, PartiallyErasedPin};
 mod erased;
 pub use erased::{EPin, ErasedPin};
+mod exti;
+pub use exti::ExtiPin;
 mod dynamic;
 pub use dynamic::{Dynamic, DynamicPin};
 mod hal_02;
@@ -150,6 +149,8 @@ mod marker {
     pub trait IntoAf<const A: u8> {}
 }
 
+impl<MODE> marker::Interruptable for Output<MODE> {}
+impl marker::Interruptable for Input {}
 impl marker::Readable for Input {}
 impl marker::Readable for Output<OpenDrain> {}
 impl marker::Active for Input {}
@@ -215,109 +216,6 @@ af!(
     15: AF15
 );
 
-use marker::Interruptable;
-impl<MODE> Interruptable for Output<MODE> {}
-impl Interruptable for Input {}
-
-/// External Interrupt Pin
-pub trait ExtiPin {
-    fn make_interrupt_source(&mut self, syscfg: &mut SysCfg);
-    fn trigger_on_edge(&mut self, exti: &mut EXTI, level: Edge);
-    fn enable_interrupt(&mut self, exti: &mut EXTI);
-    fn disable_interrupt(&mut self, exti: &mut EXTI);
-    fn clear_interrupt_pending_bit(&mut self);
-    fn check_interrupt(&self) -> bool;
-}
-
-impl<PIN> ExtiPin for PIN
-where
-    PIN: PinExt,
-    PIN::Mode: Interruptable,
-{
-    /// Make corresponding EXTI line sensitive to this pin
-    #[inline(always)]
-    fn make_interrupt_source(&mut self, syscfg: &mut SysCfg) {
-        let i = self.pin_id();
-        let port = self.port_id() as u32;
-        let offset = 4 * (i % 4);
-        match i {
-            0..=3 => {
-                syscfg.exticr1.modify(|r, w| unsafe {
-                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
-                });
-            }
-            4..=7 => {
-                syscfg.exticr2.modify(|r, w| unsafe {
-                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
-                });
-            }
-            8..=11 => {
-                syscfg.exticr3.modify(|r, w| unsafe {
-                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
-                });
-            }
-            12..=15 => {
-                syscfg.exticr4.modify(|r, w| unsafe {
-                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
-                });
-            }
-            _ => unreachable!(),
-        }
-    }
-
-    /// Generate interrupt on rising edge, falling edge or both
-    #[inline(always)]
-    fn trigger_on_edge(&mut self, exti: &mut EXTI, edge: Edge) {
-        let i = self.pin_id();
-        match edge {
-            Edge::Rising => {
-                exti.rtsr
-                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
-                exti.ftsr
-                    .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << i)) });
-            }
-            Edge::Falling => {
-                exti.ftsr
-                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
-                exti.rtsr
-                    .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << i)) });
-            }
-            Edge::RisingFalling => {
-                exti.rtsr
-                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
-                exti.ftsr
-                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
-            }
-        }
-    }
-
-    /// Enable external interrupts from this pin.
-    #[inline(always)]
-    fn enable_interrupt(&mut self, exti: &mut EXTI) {
-        exti.imr
-            .modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.pin_id())) });
-    }
-
-    /// Disable external interrupts from this pin
-    #[inline(always)]
-    fn disable_interrupt(&mut self, exti: &mut EXTI) {
-        exti.imr
-            .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.pin_id())) });
-    }
-
-    /// Clear the interrupt pending bit for this pin
-    #[inline(always)]
-    fn clear_interrupt_pending_bit(&mut self) {
-        unsafe { (*EXTI::ptr()).pr.write(|w| w.bits(1 << self.pin_id())) };
-    }
-
-    /// Reads the interrupt pending bit for this pin
-    #[inline(always)]
-    fn check_interrupt(&self) -> bool {
-        unsafe { ((*EXTI::ptr()).pr.read().bits() & (1 << self.pin_id())) != 0 }
-    }
-}
-
 /// Generic pin type
 ///
 /// - `MODE` is one of the pin modes (see [Modes](crate::gpio#modes) section).

src/gpio/convert.rs

@@ -11,6 +11,7 @@ impl<const P: char, const N: u8, MODE: PinMode + marker::NotAlt, const A: u8, Ot
     From<Pin<P, N, MODE>> for Pin<P, N, Alternate<A, Otype>>
 where
     Alternate<A, Otype>: PinMode,
+    Self: marker::IntoAf<A>,
 {
     #[inline(always)]
     fn from(f: Pin<P, N, MODE>) -> Self {
@@ -20,6 +21,8 @@ where
 
 impl<const P: char, const N: u8, const A: u8, const B: u8> From<Pin<P, N, Alternate<B, PushPull>>>
     for Pin<P, N, Alternate<A, OpenDrain>>
+where
+    Self: marker::IntoAf<A>,
 {
     #[inline(always)]
     fn from(f: Pin<P, N, Alternate<B, PushPull>>) -> Self {

src/gpio/exti.rs

@@ -0,0 +1,123 @@
+use super::{marker, Edge, Pin, PinExt};
+use crate::{
+    pac::{Interrupt, EXTI},
+    syscfg::SysCfg,
+};
+
+impl<const P: char, const N: u8, MODE> Pin<P, N, MODE> {
+    /// NVIC interrupt number of interrupt from this pin
+    ///
+    /// Used to unmask / enable the interrupt with [`cortex_m::peripheral::NVIC::unmask()`].
+    /// This is also useful for all other [`cortex_m::peripheral::NVIC`] functions.
+    pub const fn interrupt(&self) -> Interrupt {
+        match N {
+            0 => Interrupt::EXTI0,
+            1 => Interrupt::EXTI1,
+            2 => Interrupt::EXTI2,
+            3 => Interrupt::EXTI3,
+            4 => Interrupt::EXTI4,
+            5..=9 => Interrupt::EXTI9_5,
+            10..=15 => Interrupt::EXTI15_10,
+            _ => panic!("Unsupported pin number"),
+        }
+    }
+}
+
+/// External Interrupt Pin
+pub trait ExtiPin {
+    fn make_interrupt_source(&mut self, syscfg: &mut SysCfg);
+    fn trigger_on_edge(&mut self, exti: &mut EXTI, level: Edge);
+    fn enable_interrupt(&mut self, exti: &mut EXTI);
+    fn disable_interrupt(&mut self, exti: &mut EXTI);
+    fn clear_interrupt_pending_bit(&mut self);
+    fn check_interrupt(&self) -> bool;
+}
+
+impl<PIN> ExtiPin for PIN
+where
+    PIN: PinExt,
+    PIN::Mode: marker::Interruptable,
+{
+    /// Make corresponding EXTI line sensitive to this pin
+    #[inline(always)]
+    fn make_interrupt_source(&mut self, syscfg: &mut SysCfg) {
+        let i = self.pin_id();
+        let port = self.port_id() as u32;
+        let offset = 4 * (i % 4);
+        match i {
+            0..=3 => {
+                syscfg.exticr1.modify(|r, w| unsafe {
+                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
+                });
+            }
+            4..=7 => {
+                syscfg.exticr2.modify(|r, w| unsafe {
+                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
+                });
+            }
+            8..=11 => {
+                syscfg.exticr3.modify(|r, w| unsafe {
+                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
+                });
+            }
+            12..=15 => {
+                syscfg.exticr4.modify(|r, w| unsafe {
+                    w.bits((r.bits() & !(0xf << offset)) | (port << offset))
+                });
+            }
+            _ => unreachable!(),
+        }
+    }
+
+    /// Generate interrupt on rising edge, falling edge or both
+    #[inline(always)]
+    fn trigger_on_edge(&mut self, exti: &mut EXTI, edge: Edge) {
+        let i = self.pin_id();
+        match edge {
+            Edge::Rising => {
+                exti.rtsr
+                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
+                exti.ftsr
+                    .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << i)) });
+            }
+            Edge::Falling => {
+                exti.ftsr
+                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
+                exti.rtsr
+                    .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << i)) });
+            }
+            Edge::RisingFalling => {
+                exti.rtsr
+                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
+                exti.ftsr
+                    .modify(|r, w| unsafe { w.bits(r.bits() | (1 << i)) });
+            }
+        }
+    }
+
+    /// Enable external interrupts from this pin.
+    #[inline(always)]
+    fn enable_interrupt(&mut self, exti: &mut EXTI) {
+        exti.imr
+            .modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.pin_id())) });
+    }
+
+    /// Disable external interrupts from this pin
+    #[inline(always)]
+    fn disable_interrupt(&mut self, exti: &mut EXTI) {
+        exti.imr
+            .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.pin_id())) });
+    }
+
+    /// Clear the interrupt pending bit for this pin
+    #[inline(always)]
+    fn clear_interrupt_pending_bit(&mut self) {
+        unsafe { (*EXTI::ptr()).pr.write(|w| w.bits(1 << self.pin_id())) };
+    }
+
+    /// Reads the interrupt pending bit for this pin
+    #[inline(always)]
+    fn check_interrupt(&self) -> bool {
+        unsafe { ((*EXTI::ptr()).pr.read().bits() & (1 << self.pin_id())) != 0 }
+    }
+}