11use crate :: pac:: rcc:: cfgr:: { HPRE , SW } ;
2- use crate :: pac:: rcc:: RegisterBlock as RccRB ;
3- use crate :: pac:: { rcc, RCC } ;
2+ use crate :: pac:: RCC ;
43
5- use super :: { BusClock , BusTimerClock , RccBus } ;
4+ use super :: * ;
65
76use fugit:: HertzU32 as Hertz ;
87use fugit:: RateExtU32 ;
@@ -11,199 +10,10 @@ mod pll;
1110
1211mod enable;
1312
14- /// Enable/disable peripheral
15- pub trait Enable : RccBus {
16- /// Enables peripheral
17- fn enable ( rcc : & mut RCC ) ;
18-
19- /// Disables peripheral
20- fn disable ( rcc : & mut RCC ) ;
21-
22- /// Check if peripheral enabled
23- fn is_enabled ( ) -> bool ;
24-
25- /// Check if peripheral disabled
26- #[ inline]
27- fn is_disabled ( ) -> bool {
28- !Self :: is_enabled ( )
29- }
30-
31- /// # Safety
32- ///
33- /// Enables peripheral. Takes access to RCC internally
34- unsafe fn enable_unchecked ( ) {
35- let mut rcc = RCC :: steal ( ) ;
36- Self :: enable ( & mut rcc) ;
37- }
38-
39- /// # Safety
40- ///
41- /// Disables peripheral. Takes access to RCC internally
42- unsafe fn disable_unchecked ( ) {
43- let mut rcc = RCC :: steal ( ) ;
44- Self :: disable ( & mut rcc) ;
45- }
46- }
47-
48- /// Low power enable/disable peripheral
49- pub trait LPEnable : RccBus {
50- /// Enables peripheral in low power mode
51- fn enable_in_low_power ( rcc : & mut RCC ) ;
52-
53- /// Disables peripheral in low power mode
54- fn disable_in_low_power ( rcc : & mut RCC ) ;
55-
56- /// Check if peripheral enabled in low power mode
57- fn is_enabled_in_low_power ( ) -> bool ;
58-
59- /// Check if peripheral disabled in low power mode
60- #[ inline]
61- fn is_disabled_in_low_power ( ) -> bool {
62- !Self :: is_enabled_in_low_power ( )
63- }
64-
65- /// # Safety
66- ///
67- /// Enables peripheral in low power mode. Takes access to RCC internally
68- unsafe fn enable_in_low_power_unchecked ( ) {
69- let mut rcc = RCC :: steal ( ) ;
70- Self :: enable_in_low_power ( & mut rcc) ;
71- }
72-
73- /// # Safety
74- ///
75- /// Disables peripheral in low power mode. Takes access to RCC internally
76- unsafe fn disable_in_low_power_unchecked ( ) {
77- let mut rcc = RCC :: steal ( ) ;
78- Self :: disable_in_low_power ( & mut rcc) ;
79- }
80- }
81-
82- /// Reset peripheral
83- pub trait Reset : RccBus {
84- /// Resets peripheral
85- fn reset ( rcc : & mut RCC ) ;
86-
87- /// # Safety
88- ///
89- /// Resets peripheral. Takes access to RCC internally
90- unsafe fn reset_unchecked ( ) {
91- let mut rcc = RCC :: steal ( ) ;
92- Self :: reset ( & mut rcc) ;
93- }
94- }
95-
96- /// Extension trait that constrains the `RCC` peripheral
97- pub trait RccExt {
98- /// Constrains the `RCC` peripheral so it plays nicely with the other abstractions
99- fn constrain ( self ) -> Rcc ;
100- }
101-
102- macro_rules! bus_struct {
103- ( $( $busX: ident => ( $EN: ident, $en: ident, $LPEN: ident, $lpen: ident, $RST: ident, $rst: ident, $doc: literal) , ) +) => {
104- $(
105- #[ doc = $doc]
106- #[ non_exhaustive]
107- pub struct $busX;
108-
109- impl $busX {
110- pub ( crate ) fn enr( rcc: & RccRB ) -> & rcc:: $EN {
111- rcc. $en( )
112- }
113-
114- pub ( crate ) fn lpenr( rcc: & RccRB ) -> & rcc:: $LPEN {
115- rcc. $lpen( )
116- }
117-
118- pub ( crate ) fn rstr( rcc: & RccRB ) -> & rcc:: $RST {
119- rcc. $rst( )
120- }
121- }
122- ) +
123- } ;
124- }
125-
126- bus_struct ! {
127- APB1 => ( APB1ENR , apb1enr, APB1LPENR , apb1lpenr, APB1RSTR , apb1rstr, "Advanced Peripheral Bus 1 (APB1) registers" ) ,
128- APB2 => ( APB2ENR , apb2enr, APB2LPENR , apb2lpenr, APB2RSTR , apb2rstr, "Advanced Peripheral Bus 2 (APB2) registers" ) ,
129- AHB1 => ( AHB1ENR , ahb1enr, AHB1LPENR , ahb1lpenr, AHB1RSTR , ahb1rstr, "Advanced High-performance Bus 1 (AHB1) registers" ) ,
130- //#[cfg(any(feature = "fsmc", feature = "fmc"))]
131- //AHB3 => (AHB3ENR, ahb3enr, AHB3LPENR, ahb3lpenr, AHB3RSTR, ahb3rstr, "Advanced High-performance Bus 3 (AHB3) registers"),
132- }
133- #[ cfg( not( feature = "gpio-f410" ) ) ]
134- bus_struct ! {
135- AHB2 => ( AHB2ENR , ahb2enr, AHB2LPENR , ahb2lpenr, AHB2RSTR , ahb2rstr, "Advanced High-performance Bus 2 (AHB2) registers" ) ,
136- }
137-
138- /// AMBA High-performance Bus 3 (AHB3) registers
139- #[ cfg( any( feature = "fsmc" , feature = "fmc" ) ) ]
140- #[ non_exhaustive]
141- pub struct AHB3 ;
142-
143- #[ cfg( any( feature = "fsmc" , feature = "fmc" ) ) ]
144- impl AHB3 {
145- #[ inline( always) ]
146- fn enr ( rcc : & RccRB ) -> & rcc:: AHB3ENR {
147- rcc. ahb3enr ( )
148- }
149- #[ cfg( feature = "fmc" ) ]
150- #[ inline( always) ]
151- fn lpenr ( rcc : & RccRB ) -> & rcc:: AHB3LPENR {
152- rcc. ahb3lpenr ( )
153- }
154- #[ inline( always) ]
155- fn rstr ( rcc : & RccRB ) -> & rcc:: AHB3RSTR {
156- rcc. ahb3rstr ( )
157- }
158- }
159-
160- impl BusClock for AHB1 {
161- fn clock ( clocks : & Clocks ) -> Hertz {
162- clocks. hclk
163- }
164- }
165-
166- #[ cfg( not( feature = "gpio-f410" ) ) ]
167- impl BusClock for AHB2 {
168- fn clock ( clocks : & Clocks ) -> Hertz {
169- clocks. hclk
170- }
171- }
172-
173- #[ cfg( any( feature = "fsmc" , feature = "fmc" ) ) ]
174- impl BusClock for AHB3 {
175- fn clock ( clocks : & Clocks ) -> Hertz {
176- clocks. hclk
177- }
178- }
179-
180- impl BusClock for APB1 {
181- fn clock ( clocks : & Clocks ) -> Hertz {
182- clocks. pclk1
183- }
184- }
185-
186- impl BusClock for APB2 {
187- fn clock ( clocks : & Clocks ) -> Hertz {
188- clocks. pclk2
189- }
190- }
191-
192- impl BusTimerClock for APB1 {
193- fn timer_clock ( clocks : & Clocks ) -> Hertz {
194- clocks. timclk1
195- }
196- }
197-
198- impl BusTimerClock for APB2 {
199- fn timer_clock ( clocks : & Clocks ) -> Hertz {
200- clocks. timclk2
201- }
202- }
203-
20413impl RccExt for RCC {
20514 fn constrain ( self ) -> Rcc {
20615 Rcc {
16+ rb : self ,
20717 cfgr : CFGR {
20818 hse : None ,
20919 hse_bypass : false ,
@@ -230,11 +40,6 @@ impl RccExt for RCC {
23040 }
23141}
23242
233- /// Constrained RCC peripheral
234- pub struct Rcc {
235- pub cfgr : CFGR ,
236- }
237-
23843/// Built-in high speed clock frequency
23944pub const HSI : u32 = 16_000_000 ; // Hz
24045
@@ -914,31 +719,31 @@ impl RealSaiClocks {
914719#[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
915720#[ derive( Copy , Clone , PartialEq , Eq , Debug ) ]
916721pub struct Clocks {
917- hclk : Hertz ,
918- pclk1 : Hertz ,
919- pclk2 : Hertz ,
920- timclk1 : Hertz ,
921- timclk2 : Hertz ,
922- sysclk : Hertz ,
923- pll48clk : Option < Hertz > ,
722+ pub ( super ) hclk : Hertz ,
723+ pub ( super ) pclk1 : Hertz ,
724+ pub ( super ) pclk2 : Hertz ,
725+ pub ( super ) timclk1 : Hertz ,
726+ pub ( super ) timclk2 : Hertz ,
727+ pub ( super ) sysclk : Hertz ,
728+ pub ( super ) pll48clk : Option < Hertz > ,
924729
925730 #[ cfg( not( feature = "rcc_i2s_apb" ) ) ]
926- i2s_clk : Option < Hertz > ,
731+ pub ( super ) i2s_clk : Option < Hertz > ,
927732 #[ cfg( feature = "rcc_i2s_apb" ) ]
928- i2s_apb1_clk : Option < Hertz > ,
733+ pub ( super ) i2s_apb1_clk : Option < Hertz > ,
929734 #[ cfg( feature = "rcc_i2s_apb" ) ]
930- i2s_apb2_clk : Option < Hertz > ,
735+ pub ( super ) i2s_apb2_clk : Option < Hertz > ,
931736
932737 #[ cfg( feature = "sai" ) ]
933738 #[ cfg( not( feature = "sai2" ) ) ]
934- saia_clk : Option < Hertz > ,
739+ pub ( super ) saia_clk : Option < Hertz > ,
935740 #[ cfg( feature = "sai" ) ]
936741 #[ cfg( not( feature = "sai2" ) ) ]
937- saib_clk : Option < Hertz > ,
742+ pub ( super ) saib_clk : Option < Hertz > ,
938743 #[ cfg( feature = "sai2" ) ]
939- sai1_clk : Option < Hertz > ,
744+ pub ( super ) sai1_clk : Option < Hertz > ,
940745 #[ cfg( feature = "sai2" ) ]
941- sai2_clk : Option < Hertz > ,
746+ pub ( super ) sai2_clk : Option < Hertz > ,
942747}
943748
944749impl Clocks {
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