remove NoPin, use Option

burrbull · burrbull · commit a811bf4b8d50 · 2025-06-09T19:19:00.000+03:00
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -16,9 +16,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
  - `serial` mod refactor [#833] [#839]
  - FMPI2c APB timings [#770]
  - Fefactor FMPI2c `embedded-hal` implementations [#784]
+ - remove `NoPin`, use `Option` instead [#813]
 
 [#770]: https://github.com/stm32-rs/stm32f4xx-hal/pull/770
 [#784]: https://github.com/stm32-rs/stm32f4xx-hal/pull/784
+[#813]: https://github.com/stm32-rs/stm32f4xx-hal/pull/813
 [#829]: https://github.com/stm32-rs/stm32f4xx-hal/pull/829
 [#831]: https://github.com/stm32-rs/stm32f4xx-hal/pull/831
 [#832]: https://github.com/stm32-rs/stm32f4xx-hal/pull/832
diff --git a/examples/analog-stopwatch-with-spi-ssd1306.rs b/examples/analog-stopwatch-with-spi-ssd1306.rs
@@ -111,7 +111,7 @@ fn main() -> ! {
 
     let spi = Spi::new(
         dp.SPI4,
-        (sck, miso, mosi),
+        (Some(sck), Some(miso), Some(mosi)),
         Mode {
             polarity: Polarity::IdleLow,
             phase: Phase::CaptureOnFirstTransition,
diff --git a/examples/i2s-audio-out.rs b/examples/i2s-audio-out.rs
@@ -50,11 +50,10 @@ use cortex_m_rt::entry;
 
 use rtt_target::{rprintln, rtt_init_print};
 
-use stm32f4xx_hal::gpio::NoPin;
 use stm32f4xx_hal::i2s::stm32_i2s_v12x::transfer::*;
 use stm32f4xx_hal::i2s::I2s;
 use stm32f4xx_hal::nb::block;
-use stm32f4xx_hal::pac::Peripherals;
+use stm32f4xx_hal::pac::{Peripherals, SPI3};
 use stm32f4xx_hal::prelude::*;
 
 const SAMPLE_RATE: u32 = 48_000;
@@ -104,7 +103,7 @@ fn main() -> ! {
         .i2s_clk(61440.kHz())
         .freeze();
 
-    let i2s_pins = (gpioa.pa4, gpioc.pc10, NoPin::new(), gpioc.pc12);
+    let i2s_pins = (gpioa.pa4, gpioc.pc10, SPI3::NoMck, gpioc.pc12);
     let i2s = I2s::new(dp.SPI3, i2s_pins, &clocks);
     let i2s_config = I2sTransferConfig::new_master()
         .transmit()
diff --git a/examples/ist7920-bidi-normal-spi.rs b/examples/ist7920-bidi-normal-spi.rs
@@ -45,7 +45,9 @@ fn main() -> ! {
     // Change spi transfer mode to Bidi for more efficient operations.
     // let spi = Spi::new(dp.SPI1, (sck, miso, mosi), mode, 8.MHz(), &clocks).to_bidi_transfer_mode();
     // or
-    let spi = dp.SPI1.spi_bidi((sck, mosi), mode, 8.MHz(), &clocks);
+    let spi = dp
+        .SPI1
+        .spi_bidi((Some(sck), Some(mosi)), mode, 8.MHz(), &clocks);
 
     let iface = SPIInterface::new(spi, dc, cs);
 
diff --git a/examples/rtic-dual-i2s-audio-in-out.rs b/examples/rtic-dual-i2s-audio-in-out.rs
@@ -165,11 +165,11 @@ mod app {
 
         // I2S pins: (WS, CK, MCLK, SD) for I2S2
         let i2s2_pins = (
-            gpiob.pb12, //WS
-            gpiob.pb13, //CK
-            gpioc.pc6,  //MCK
-            gpiob.pb15, //SD
-            gpiob.pb14, //ExtSD
+            gpiob.pb12,      //WS
+            gpiob.pb13,      //CK
+            Some(gpioc.pc6), //MCK
+            gpiob.pb15,      //SD
+            gpiob.pb14,      //ExtSD
         );
         let i2s2 = DualI2s::new(device.SPI2, device.I2S2EXT, i2s2_pins, &clocks);
         let i2s2_config = DualI2sDriverConfig::new_master()
diff --git a/examples/rtic-i2s-audio-in-out.rs b/examples/rtic-i2s-audio-in-out.rs
@@ -80,7 +80,7 @@ mod app {
 
     use super::hal;
 
-    use hal::gpio::{Edge, NoPin};
+    use hal::gpio::Edge;
     use hal::i2s::stm32_i2s_v12x::driver::*;
     use hal::i2s::I2s;
     use hal::pac::Interrupt;
@@ -169,10 +169,10 @@ mod app {
 
         // I2S pins: (WS, CK, MCLK, SD) for I2S2
         let i2s2_pins = (
-            gpiob.pb12, //WS
-            gpiob.pb13, //CK
-            gpioc.pc6,  //MCK
-            gpiob.pb15, //SD
+            gpiob.pb12,      //WS
+            gpiob.pb13,      //CK
+            Some(gpioc.pc6), //MCK
+            gpiob.pb15,      //SD
         );
         let i2s2 = I2s::new(device.SPI2, i2s2_pins, &clocks);
         let i2s2_config = I2sDriverConfig::new_master()
@@ -186,8 +186,8 @@ mod app {
         i2s2_driver.set_rx_interrupt(true);
         i2s2_driver.set_error_interrupt(true);
 
-        // I2S3 pins: (WS, CK, NoPin, SD) for I2S3
-        let i2s3_pins = (gpioa.pa4, gpioc.pc10, NoPin::new(), gpioc.pc12);
+        // I2S3 pins: (WS, CK, NoMck, SD) for I2S3
+        let i2s3_pins = (gpioa.pa4, gpioc.pc10, SPI3::NoMck, gpioc.pc12);
         let i2s3 = I2s::new(device.SPI3, i2s3_pins, &clocks);
         let i2s3_config = i2s2_config.to_slave().transmit();
         let mut i2s3_driver = I2sDriver::new(i2s3, i2s3_config);
diff --git a/examples/rtic-spi-slave-dma.rs b/examples/rtic-spi-slave-dma.rs
@@ -77,7 +77,7 @@ mod app {
             phase: Phase::CaptureOnFirstTransition,
         };
 
-        let mut spi3 = SpiSlave::new(spi, (sck, miso, mosi, None), mode);
+        let mut spi3 = SpiSlave::new(spi, (Some(sck), Some(miso), Some(mosi), SPI3::NoNss), mode);
         spi3.set_internal_nss(false);
 
         let (tx, rx) = spi3.use_dma().txrx();
diff --git a/examples/sai-duplex.rs b/examples/sai-duplex.rs
@@ -43,7 +43,7 @@ fn main() -> ! {
         num_slots: 2,
     };
     let tx = saia.master_tx(
-        (gpioe.pe2, gpioe.pe4, gpioe.pe5, gpioe.pe6),
+        (Some(gpioe.pe2), gpioe.pe4, gpioe.pe5, gpioe.pe6),
         protocol,
         48.kHz(),
         &clocks,
diff --git a/examples/spi-dma.rs b/examples/spi-dma.rs
@@ -13,20 +13,15 @@ use stm32f4xx_hal::pac::interrupt;
 use stm32f4xx_hal::{
     dma::{config, MemoryToPeripheral, Stream4, StreamsTuple, Transfer},
     gpio::Speed,
-    pac,
+    pac::{self, SPI2},
     prelude::*,
     spi::*,
 };
 
 const ARRAY_SIZE: usize = 100;
 
-type SpiDma = Transfer<
-    Stream4<pac::DMA1>,
-    0,
-    Tx<pac::SPI2>,
-    MemoryToPeripheral,
-    &'static mut [u8; ARRAY_SIZE],
->;
+type SpiDma =
+    Transfer<Stream4<pac::DMA1>, 0, Tx<SPI2>, MemoryToPeripheral, &'static mut [u8; ARRAY_SIZE]>;
 
 static G_TRANSFER: Mutex<RefCell<Option<SpiDma>>> = Mutex::new(RefCell::new(None));
 
@@ -56,7 +51,13 @@ fn main() -> ! {
             phase: Phase::CaptureOnFirstTransition,
         };
 
-        let spi2 = Spi::new(dp.SPI2, (pb13, NoMiso::new(), pb15), mode, 3.MHz(), &clocks);
+        let spi2 = Spi::new(
+            dp.SPI2,
+            (Some(pb13), SPI2::NoMiso, Some(pb15)),
+            mode,
+            3.MHz(),
+            &clocks,
+        );
 
         let buffer = cortex_m::singleton!(: [u8; ARRAY_SIZE] = [1; ARRAY_SIZE]).unwrap();
 
diff --git a/examples/spi_slave.rs b/examples/spi_slave.rs
@@ -29,8 +29,10 @@ fn main() -> ! {
     let mosi = gpioa.pa7.internal_resistor(Pull::Down);
 
     // clock speed is determined by the master
-    let nss = gpioa.pa4.internal_resistor(Pull::Up).into();
-    let mut spi = p.SPI1.spi_slave((sck, miso, mosi, Some(nss)), MODE);
+    let nss = gpioa.pa4.internal_resistor(Pull::Up);
+    let mut spi = p
+        .SPI1
+        .spi_slave((Some(sck), Some(miso), Some(mosi), Some(nss)), MODE);
     // alternativelly you could use software `chip select`
     // let mut spi = SpiSlave::new(p.SPI1, (sck, miso, mosi, None), MODE);
     // spi.set_internal_nss(false);
diff --git a/examples/ws2812-spi.rs b/examples/ws2812-spi.rs
@@ -6,7 +6,10 @@ use panic_halt as _;
 use stm32f4xx_hal as hal;
 
 use cortex_m_rt::entry;
-use hal::{gpio::NoPin, pac, prelude::*};
+use hal::{
+    pac::{self, SPI1},
+    prelude::*,
+};
 use smart_leds::{brightness, hsv::RGB8, SmartLedsWrite};
 use ws2812_spi as ws2812;
 
@@ -22,7 +25,7 @@ fn main() -> ! {
     let gpioa = dp.GPIOA.split();
 
     let spi = dp.SPI1.spi(
-        (gpioa.pa5, NoPin::new(), gpioa.pa7),
+        (Some(gpioa.pa5), SPI1::NoMiso, Some(gpioa.pa7)),
         ws2812::MODE,
         3000.kHz(),
         &clocks,
diff --git a/src/can.rs b/src/can.rs
@@ -1,7 +1,7 @@
 //! # Controller Area Network (CAN) Interface
 //!
 
-use crate::gpio::{self, NoPin};
+use crate::gpio;
 use crate::pac;
 use crate::rcc;
 
@@ -39,74 +39,57 @@ mod can3 {
 pub trait CanExt: Sized + Instance {
     fn can(self, pins: (impl Into<Self::Tx>, impl Into<Self::Rx>)) -> Can<Self>;
 
-    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Rx>;
+    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self>;
 
-    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Tx>;
+    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self>;
 }
 
 impl<CAN: Instance> CanExt for CAN {
     fn can(self, pins: (impl Into<Self::Tx>, impl Into<Self::Rx>)) -> Can<Self> {
         Can::new(self, pins)
     }
 
-    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Rx>,
-    {
+    fn tx(self, tx_pin: impl Into<Self::Tx>) -> Can<Self> {
         Can::tx(self, tx_pin)
     }
 
-    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self>
-    where
-        NoPin: Into<Self::Tx>,
-    {
+    fn rx(self, rx_pin: impl Into<Self::Rx>) -> Can<Self> {
         Can::rx(self, rx_pin)
     }
 }
 
 /// Interface to the CAN peripheral.
 pub struct Can<CAN: Instance> {
     can: CAN,
-    pins: (CAN::Tx, CAN::Rx),
+    pins: (Option<CAN::Tx>, Option<CAN::Rx>),
 }
 
 impl<CAN: Instance> Can<CAN> {
     /// Creates a CAN interface.
     pub fn new(can: CAN, pins: (impl Into<CAN::Tx>, impl Into<CAN::Rx>)) -> Self {
+        Self::_new(can, (Some(pins.0.into()), Some(pins.1.into())))
+    }
+    fn _new(can: CAN, pins: (Option<CAN::Tx>, Option<CAN::Rx>)) -> Self {
         unsafe {
             CAN::enable_unchecked();
             CAN::reset_unchecked();
         }
 
-        let pins = (pins.0.into(), pins.1.into());
-
         Can { can, pins }
     }
 
-    pub fn release(self) -> (CAN, (CAN::Tx, CAN::Rx)) {
+    pub fn release(self) -> (CAN, (Option<CAN::Tx>, Option<CAN::Rx>)) {
         (self.can, self.pins)
     }
 }
 
 impl<CAN: Instance> Can<CAN> {
-    pub fn tx(usart: CAN, tx_pin: impl Into<CAN::Tx>) -> Self
-    where
-        NoPin: Into<CAN::Rx>,
-    {
-        Self::new(usart, (tx_pin, NoPin::new()))
+    pub fn tx(usart: CAN, tx_pin: impl Into<CAN::Tx>) -> Self {
+        Self::_new(usart, (Some(tx_pin.into()), None))
     }
-}
 
-impl<CAN: Instance> Can<CAN> {
-    pub fn rx(usart: CAN, rx_pin: impl Into<CAN::Rx>) -> Self
-    where
-        NoPin: Into<CAN::Tx>,
-    {
-        Self::new(usart, (NoPin::new(), rx_pin))
+    pub fn rx(usart: CAN, rx_pin: impl Into<CAN::Rx>) -> Self {
+        Self::_new(usart, (None, Some(rx_pin.into())))
     }
 }
 
diff --git a/src/gpio.rs b/src/gpio.rs
@@ -76,16 +76,6 @@ pub use embedded_hal_02::digital::v2::PinState;
 
 use core::fmt;
 
-/// A filler pin type
-#[derive(Debug, Default)]
-#[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub struct NoPin<Otype = PushPull>(PhantomData<Otype>);
-impl<Otype> NoPin<Otype> {
-    pub fn new() -> Self {
-        Self(PhantomData)
-    }
-}
-
 /// Extension trait to split a GPIO peripheral in independent pins and registers
 pub trait GpioExt {
     /// The parts to split the GPIO into
diff --git a/src/gpio/alt.rs b/src/gpio/alt.rs
@@ -65,17 +65,13 @@ macro_rules! extipin {
 use extipin;
 
 macro_rules! pin {
-    ( $($(#[$docs:meta])* <$name:ident, $Otype:ident> for $(no: $NoPin:ident,)? [$(
+    ( $($(#[$docs:meta])* <$name:ident, $Otype:ident> for [$(
         $(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
     )*],)*) => {
         $(
             #[derive(Debug)]
             $(#[$docs])*
             pub enum $name {
-                $(
-                    None($NoPin<$Otype>),
-                )?
-
                 $(
                     $(#[$attr])*
                     $PX(gpio::$PX<$crate::gpio::Alternate<$A, $Otype>>),
@@ -128,14 +124,6 @@ macro_rules! pin {
                 extipin! { $( $(#[$attr])* $PX, )* }
             }
 
-            $(
-                impl From<$NoPin<$Otype>> for $name {
-                    fn from(p: $NoPin<$Otype>) -> Self {
-                        Self::None(p)
-                    }
-                }
-            )?
-
             $(
                 $(#[$attr])*
                 impl<MODE> From<gpio::$PX<MODE>> for $name
@@ -175,17 +163,13 @@ macro_rules! pin {
         )*
     };
 
-    ( $($(#[$docs:meta])* <$name:ident> default:$DefaultOtype:ident for $(no: $NoPin:ident,)? [$(
+    ( $($(#[$docs:meta])* <$name:ident> default:$DefaultOtype:ident for [$(
             $(#[$attr:meta])* $PX:ident<$A:literal>,
     )*],)*) => {
         $(
             #[derive(Debug)]
             $(#[$docs])*
             pub enum $name<Otype = $DefaultOtype> {
-                $(
-                    None($NoPin<Otype>),
-                )?
-
                 $(
                     $(#[$attr])*
                     $PX(gpio::$PX<$crate::gpio::Alternate<$A, Otype>>),
@@ -238,14 +222,6 @@ macro_rules! pin {
                 extipin! { $( $(#[$attr])* $PX, )* }
             }
 
-            $(
-                impl<Otype> From<$NoPin<Otype>> for $name<Otype> {
-                    fn from(p: $NoPin<Otype>) -> Self {
-                        Self::None(p)
-                    }
-                }
-            )?
-
             $(
                 $(#[$attr])*
                 impl<MODE, Otype> From<gpio::$PX<MODE>> for $name<Otype>
@@ -387,6 +363,8 @@ pub trait SaiChannels {
 }
 #[cfg(feature = "sai1")]
 pub trait SaiChannel {
+    #[allow(non_upper_case_globals)]
+    const NoMclk: Option<Self::Mclk> = None;
     type Fs;
     type Mclk;
     type Sck;
diff --git a/src/gpio/alt/f4.rs b/src/gpio/alt/f4.rs
diff --git a/src/i2s.rs b/src/i2s.rs
diff --git a/src/sai.rs b/src/sai.rs
diff --git a/src/serial.rs b/src/serial.rs
diff --git a/src/spi.rs b/src/spi.rs
