|
| 1 | +#![no_main] |
| 2 | +#![no_std] |
| 3 | + |
| 4 | +use panic_halt as _; |
| 5 | + |
| 6 | +use crate::hal::spi::{Mode, Phase, Polarity}; |
| 7 | +use crate::hal::{gpio::Pull, pac, prelude::*}; |
| 8 | +use cortex_m::asm; |
| 9 | +use cortex_m_rt::entry; |
| 10 | +use stm32f4xx_hal as hal; |
| 11 | + |
| 12 | +/// SPI mode |
| 13 | +pub const MODE: Mode = Mode { |
| 14 | + phase: Phase::CaptureOnFirstTransition, |
| 15 | + polarity: Polarity::IdleLow, |
| 16 | +}; |
| 17 | + |
| 18 | +#[entry] |
| 19 | +fn main() -> ! { |
| 20 | + let p = pac::Peripherals::take().unwrap(); |
| 21 | + |
| 22 | + let rcc = p.RCC.constrain(); |
| 23 | + let _clocks = rcc.cfgr.freeze(); |
| 24 | + |
| 25 | + let gpioa = p.GPIOA.split(); |
| 26 | + |
| 27 | + let sck = gpioa.pa5.internal_resistor(Pull::Up); |
| 28 | + let miso = gpioa.pa6.internal_resistor(Pull::Down); |
| 29 | + let mosi = gpioa.pa7.internal_resistor(Pull::Down); |
| 30 | + |
| 31 | + // clock speed is determined by the master |
| 32 | + let nss = gpioa.pa4.internal_resistor(Pull::Up).into(); |
| 33 | + let mut spi = p.SPI1.spi_slave((sck, miso, mosi, Some(nss)), MODE); |
| 34 | + // alternativelly you could use software `chip select` |
| 35 | + // let mut spi = SpiSlave::new(p.SPI1, (sck, miso, mosi, None), MODE); |
| 36 | + // spi.set_internal_nss(false); |
| 37 | + |
| 38 | + let mut data = [0x1]; |
| 39 | + // this will block until the master starts the clock |
| 40 | + spi.transfer_in_place(&mut data).unwrap(); |
| 41 | + |
| 42 | + // when you reach this breakpoint you'll be able to inspect the variable `data` which contains the |
| 43 | + // data sent by the master |
| 44 | + asm::bkpt(); |
| 45 | + |
| 46 | + loop { |
| 47 | + continue; |
| 48 | + } |
| 49 | +} |
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