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1 parent e4dc211 commit 21fb0dbCopy full SHA for 21fb0db
src/rcc/mod.rs
@@ -235,7 +235,7 @@ impl Rcc {
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self.rb
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.pllsyscfgr
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.write(move |w| unsafe { w.pllq().bits(div - 1) });
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- let req = freq / div as u32;
+ let req = pll_freq / div as u32;
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Some(req.hz())
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}
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_ => None,
@@ -246,7 +246,7 @@ impl Rcc {
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.write(move |w| unsafe { w.pllp().bits(div - 1) });
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