ADC: add set_clock_source

Author: mattico

src/analog/adc.rs

@@ -46,6 +46,32 @@ pub enum SampleTime {
     T_160 = 0b111,
 }
 
+#[derive(Clone, Copy, PartialEq, Eq, Debug)]
+pub enum ClockSource {
+    Pclk(PclkDiv),
+    Async(AsyncClockDiv),
+}
+
+#[derive(Clone, Copy, PartialEq, Eq, Debug)]
+pub enum PclkDiv {
+    PclkD1 = 3,
+    PclkD2 = 1,
+    PclkD4 = 2,
+}
+
+#[derive(Clone, Copy, PartialEq, Eq, Debug)]
+pub enum AsyncClockDiv {
+    AsyncD1 = 0,
+    AsyncD2 = 1,
+    AsyncD4 = 2,
+    AsyncD8 = 3,
+    AsyncD16 = 4,
+    AsyncD32 = 5,
+    AsyncD64 = 6,
+    AsyncD128 = 7,
+    AsyncD256 = 8,
+}
+
 /// Analog to Digital converter interface
 pub struct Adc {
     rb: ADC,
@@ -72,6 +98,21 @@ impl Adc {
         }
     }
 
+    pub fn set_clock_source(&mut self, clock_source: ClockSource) {
+        match clock_source {
+            ClockSource::Pclk(div) => self
+                .rb
+                .cfgr2
+                .modify(|_, w| unsafe { w.ckmode().bits(div as u8) }),
+            ClockSource::Async(div) => {
+                self.rb.cfgr2.modify(|_, w| unsafe { w.ckmode().bits(0) });
+                self.rb
+                    .ccr
+                    .modify(|_, w| unsafe { w.presc().bits(div as u8) });
+            }
+        }
+    }
+
     /// Runs the calibration routine on the ADC
     ///
     /// Wait for tADCVREG_SETUP (20us on STM32G071x8) after calling [`Self::new()`] before calibrating, to wait for the