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Merge pull request #55 from stm32-rs/feature/pwm
Complimentary PWM
2 parents 1193b21 + 13d10fc commit a674aaa

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2 files changed

+29
-16
lines changed

2 files changed

+29
-16
lines changed

src/timer/pins.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ timer_pins!(TIM1, [
3939
(Channel4, PA11<DefaultMode>, AltFunction::AF2),
4040
(Channel4, PC11<DefaultMode>, AltFunction::AF2),
4141
]);
42+
4243
// Inverted pins
4344
timer_pins!(TIM1, [
4445
(Channel1, PA7<DefaultMode>, AltFunction::AF2),
@@ -99,6 +100,7 @@ timer_pins!(TIM15, [
99100
(Channel2, PB15<DefaultMode>, AltFunction::AF5),
100101
(Channel2, PC2<DefaultMode>, AltFunction::AF2),
101102
]);
103+
102104
// Inverted pins
103105
#[cfg(any(feature = "stm32g070", feature = "stm32g071", feature = "stm32g081"))]
104106
timer_pins!(TIM15, [
@@ -112,6 +114,7 @@ timer_pins!(TIM16, [
112114
(Channel1, PB8<DefaultMode>, AltFunction::AF2),
113115
(Channel1, PD0<DefaultMode>, AltFunction::AF2),
114116
]);
117+
115118
// Inverted pins
116119
timer_pins!(TIM16, [
117120
(Channel1, PB6<DefaultMode>, AltFunction::AF2),
@@ -122,6 +125,7 @@ timer_pins!(TIM17, [
122125
(Channel1, PB9<DefaultMode>, AltFunction::AF2),
123126
(Channel1, PD1<DefaultMode>, AltFunction::AF2),
124127
]);
128+
125129
// Inverted pins
126130
timer_pins!(TIM17, [
127131
(Channel1, PB7<DefaultMode>, AltFunction::AF2),

src/timer/pwm.rs

Lines changed: 25 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -107,9 +107,18 @@ macro_rules! pwm_hal {
107107
}
108108
)+
109109
};
110+
}
110111

111-
($($TIMX:ident:
112-
($CH:ty, $ccxe:ident, $ccmrx_output:ident, $ocxpe:ident, $ocxm:ident, $ccrx:ident $(,$moe:ident)*),)+
112+
macro_rules! pwm_advanced_hal {
113+
($($TIMX:ident: (
114+
$CH:ty,
115+
$ccxe:ident $(: $ccxne:ident)*,
116+
$ccmrx_output:ident,
117+
$ocxpe:ident,
118+
$ocxm:ident,
119+
$ccrx:ident
120+
$(, $moe:ident)*
121+
) ,)+
113122
) => {
114123
$(
115124
impl hal::PwmPin for PwmPin<$TIMX, $CH> {
@@ -126,6 +135,9 @@ macro_rules! pwm_hal {
126135
let tim = &*$TIMX::ptr();
127136
tim.$ccmrx_output().modify(|_, w| w.$ocxpe().set_bit().$ocxm().bits(6));
128137
tim.ccer.modify(|_, w| w.$ccxe().set_bit());
138+
$(
139+
tim.ccer.modify(|_, w| w.$ccxne().bit(true));
140+
)*
129141
$(
130142
tim.bdtr.modify(|_, w| w.$moe().set_bit());
131143
)*
@@ -148,14 +160,19 @@ macro_rules! pwm_hal {
148160
};
149161
}
150162

151-
pwm_hal! {
152-
TIM1: (Channel1, cc1e, ccmr1_output, oc1pe, oc1m, ccr1, moe),
153-
TIM1: (Channel2, cc2e, ccmr1_output, oc2pe, oc2m, ccr2, moe),
154-
TIM1: (Channel3, cc3e, ccmr2_output, oc3pe, oc3m, ccr3, moe),
163+
pwm_advanced_hal! {
164+
TIM1: (Channel1, cc1e: cc1ne, ccmr1_output, oc1pe, oc1m, ccr1, moe),
165+
TIM1: (Channel2, cc2e: cc2ne, ccmr1_output, oc2pe, oc2m, ccr2, moe),
166+
TIM1: (Channel3, cc3e: cc3ne, ccmr2_output, oc3pe, oc3m, ccr3, moe),
155167
TIM1: (Channel4, cc4e, ccmr2_output, oc4pe, oc4m, ccr4, moe),
156168
TIM14: (Channel1, cc1e, ccmr1_output, oc1pe, oc1m, ccr1),
157-
TIM16: (Channel1, cc1e, ccmr1_output, oc1pe, oc1m, ccr1, moe),
158-
TIM17: (Channel1, cc1e, ccmr1_output, oc1pe, oc1m, ccr1, moe),
169+
TIM16: (Channel1, cc1e: cc1ne, ccmr1_output, oc1pe, oc1m, ccr1, moe),
170+
TIM17: (Channel1, cc1e: cc1ne, ccmr1_output, oc1pe, oc1m, ccr1, moe),
171+
}
172+
173+
#[cfg(any(feature = "stm32g070", feature = "stm32g071", feature = "stm32g081"))]
174+
pwm_advanced_hal! {
175+
TIM15: (Channel1, cc1e: cc1ne, ccmr1_output, oc1pe, oc1m, ccr1, moe),
159176
}
160177

161178
#[cfg(feature = "stm32g0x1")]
@@ -164,20 +181,12 @@ pwm_hal! {
164181
TIM2: (Channel2, cc2e, ccmr1_output, oc2pe, oc2m, ccr2, ccr2_l, ccr2_h),
165182
TIM2: (Channel3, cc3e, ccmr2_output, oc3pe, oc3m, ccr3, ccr3_l, ccr3_h),
166183
TIM2: (Channel4, cc4e, ccmr2_output, oc4pe, oc4m, ccr4, ccr4_l, ccr4_h),
167-
}
168-
169-
pwm_hal! {
170184
TIM3: (Channel1, cc1e, ccmr1_output, oc1pe, oc1m, ccr1, ccr1_l, ccr1_h),
171185
TIM3: (Channel2, cc2e, ccmr1_output, oc2pe, oc2m, ccr2, ccr2_l, ccr2_h),
172186
TIM3: (Channel3, cc3e, ccmr2_output, oc3pe, oc3m, ccr3, ccr3_l, ccr3_h),
173187
TIM3: (Channel4, cc4e, ccmr2_output, oc4pe, oc4m, ccr4, ccr4_l, ccr4_h),
174188
}
175189

176-
#[cfg(any(feature = "stm32g070", feature = "stm32g071", feature = "stm32g081"))]
177-
pwm_hal! {
178-
TIM15: (Channel1, cc1e, ccmr1_output, oc1pe, oc1m, ccr1, moe),
179-
}
180-
181190
pwm! {
182191
TIM1: (apbenr2, apbrstr2, tim1, tim1en, tim1rst, arr),
183192
TIM3: (apbenr1, apbrstr1, tim3, tim3en, tim3rst, arr_l, arr_h),

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