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no111u3no111u3
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Merge pull request #83 from BridgeSource/flash_patches
Changes to Flash.rs
2 parents 4d3dc74 + f5fdae3 commit 035f767

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‎examples/flash_with_rtic.rs

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#![allow(unsafe_code)]
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#![allow(warnings)]
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#![allow(missing_docs)]
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#![allow(unused_variables)]
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#![no_main]
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#![no_std]
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mod utils;
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#[rtic::app(device = stm32g4xx_hal::stm32g4::stm32g474, peripherals = true)]
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mod app {
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use crate::utils::logger;
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use stm32g4xx_hal::flash::{FlashExt, FlashSize, FlashWriter, Parts};
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use stm32g4xx_hal::prelude::*;
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use stm32g4xx_hal::rcc::{PllConfig, RccExt};
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const LOG_LEVEL: log::LevelFilter = log::LevelFilter::Info;
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use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics
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// Resources shared between tasks
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#[shared]
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struct Shared {}
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// Local resources to specific tasks (cannot be shared)
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#[local]
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struct Local {}
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fn compare_arrays(a: &[u8], b: &[u8]) -> bool {
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if a.len() != b.len() {
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return false;
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}
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for i in 0..a.len() {
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if a[i] != b[i] {
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return false;
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}
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}
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true
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}
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#[init]
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fn init(cx: init::Context) -> (Shared, Local, init::Monotonics) {
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let dp = cx.device;
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let cp = cx.core;
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let rcc = dp.RCC.constrain();
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let mut pll_config = stm32g4xx_hal::rcc::PllConfig::default();
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// Sysclock is based on PLL_R
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pll_config.mux = stm32g4xx_hal::rcc::PLLSrc::HSI; // 16MHz
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pll_config.n = stm32g4xx_hal::rcc::PllNMul::MUL_32;
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pll_config.m = stm32g4xx_hal::rcc::PllMDiv::DIV_2; // f(vco) = 16MHz*32/2 = 256MHz
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pll_config.r = Some(stm32g4xx_hal::rcc::PllRDiv::DIV_2); // f(sysclock) = 256MHz/2 = 128MHz
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// Note to future self: The AHB clock runs the timers, among other things.
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// Please refer to the Clock Tree manual to determine if it is worth
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// changing to a lower speed for battery life savings.
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let mut clock_config = stm32g4xx_hal::rcc::Config::default()
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.pll_cfg(pll_config)
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.clock_src(stm32g4xx_hal::rcc::SysClockSrc::PLL);
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// After clock configuration, the following should be true:
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// Sysclock is 128MHz
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// AHB clock is 128MHz
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// APB1 clock is 128MHz
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// APB2 clock is 128MHz
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// The ADC will ultimately be put into synchronous mode and will derive
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// its clock from the AHB bus clock, with a prescalar of 2 or 4.
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let mut rcc = rcc.freeze(clock_config);
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unsafe {
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let mut flash = &(*stm32g4xx_hal::stm32::FLASH::ptr());
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flash.acr.modify(|_, w| {
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w.latency().bits(0b1000) // 8 wait states
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});
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}
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// *** FLASH Memory ***
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let one_byte = [0x12 as u8];
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let two_bytes = [0xAB, 0xCD as u8];
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let three_bytes = [0x12, 0x34, 0x56 as u8];
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let four_bytes = [0xAB, 0xCD, 0xEF, 0xBA as u8];
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let eight_bytes = [0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0 as u8];
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let sixteen_bytes = [
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0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC,
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0xDE, 0xF0 as u8,
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];
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let mut flash = dp.FLASH.constrain();
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let mut flash_writer = flash.writer::<2048>(FlashSize::Sz256K);
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const FLASH_SPACING: u32 = 16; // Separate flash writes by 16 bytes
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const FLASH_EXAMPLE_START_ADDRESS: u32 = 0x1FC00;
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logger::info!(
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"Erasing 128 bytes at address {}",
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FLASH_EXAMPLE_START_ADDRESS
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);
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flash_writer
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.erase(FLASH_EXAMPLE_START_ADDRESS, 128)
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.unwrap(); // Erase entire page
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for i in 0..6 {
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match i {
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0 => {
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// This test should fail, as the data needs to be divisible by 8 and force padding is false
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&one_byte,
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false,
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);
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assert!(result.is_err());
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assert_eq!(
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result.err().unwrap(),
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stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8
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);
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// This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&one_byte,
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true,
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);
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assert!(result.is_ok());
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logger::info!(
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"Wrote 1 byte to address {}",
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING
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);
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}
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1 => {
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// This test should fail, as the data needs to be divisible by 8 and force padding is false
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&two_bytes,
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false,
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);
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assert!(result.is_err());
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assert_eq!(
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result.err().unwrap(),
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stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8
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);
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// This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&two_bytes,
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true,
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);
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assert!(result.is_ok());
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logger::info!(
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"Wrote 2 bytes to address {}",
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING
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);
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}
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2 => {
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// This test should fail, as the data needs to be divisible by 8 and force padding is false
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&three_bytes,
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false,
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);
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assert!(result.is_err());
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assert_eq!(
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result.err().unwrap(),
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stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8
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);
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// This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&three_bytes,
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true,
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);
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assert!(result.is_ok());
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logger::info!(
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"Wrote 3 bytes to address {}",
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING
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);
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}
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3 => {
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// This test should fail, as the data needs to be divisible by 8 and force padding is false
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&four_bytes,
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false,
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);
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assert!(result.is_err());
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assert_eq!(
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result.err().unwrap(),
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stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8
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);
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// This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF
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let result = flash_writer.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&four_bytes,
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true,
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);
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assert!(result.is_ok());
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logger::info!(
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"Wrote 4 bytes to address {}",
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING
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);
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}
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4 => {
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flash_writer
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.write(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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&eight_bytes,
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false,
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)
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.unwrap();
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logger::info!(
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"Wrote 8 bytes to address {}",
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING
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);
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}
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5 => {
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flash_writer
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.write(FLASH_EXAMPLE_START_ADDRESS + i * 16, &sixteen_bytes, false)
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.unwrap();
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logger::info!(
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"Wrote 16 bytes to address {}",
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING
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);
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}
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_ => (),
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}
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}
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logger::info!("Validating data written data by performing read and compare");
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for i in 0..6 {
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match i {
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0 => {
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let bytes = flash_writer
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.read(FLASH_EXAMPLE_START_ADDRESS as u32, one_byte.len())
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.unwrap();
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assert!(compare_arrays(&bytes, &one_byte));
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logger::info!("Validated 1 byte data");
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}
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1 => {
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let bytes = flash_writer
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.read(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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two_bytes.len(),
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)
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.unwrap();
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assert!(compare_arrays(&bytes, &two_bytes));
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logger::info!("Validated 2 byte data");
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}
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2 => {
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let bytes = flash_writer
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.read(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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three_bytes.len(),
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)
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.unwrap();
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assert!(compare_arrays(&bytes, &three_bytes));
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logger::info!("Validated 3 byte data");
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}
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3 => {
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let bytes = flash_writer
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.read(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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four_bytes.len(),
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)
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.unwrap();
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assert!(compare_arrays(&bytes, &four_bytes));
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logger::info!("Validated 4 byte data");
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}
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4 => {
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let bytes = flash_writer
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.read(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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eight_bytes.len(),
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)
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.unwrap();
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assert!(compare_arrays(&bytes, &eight_bytes));
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logger::info!("Validated 8 byte data");
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}
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5 => {
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let bytes = flash_writer
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.read(
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FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING,
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sixteen_bytes.len(),
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)
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.unwrap();
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assert!(compare_arrays(&bytes, &sixteen_bytes));
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logger::info!("Validated 5 byte data");
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}
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_ => (),
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}
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}
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logger::info!(
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"Finished flash example at address {}",
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FLASH_EXAMPLE_START_ADDRESS
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);
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(
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// Initialization of shared resources
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Shared {},
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// Initialization of task local resources
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Local {},
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// Move the monotonic timer to the RTIC run-time, this enables
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// scheduling
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init::Monotonics(),
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)
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}
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// Background task, runs whenever no other tasks are running
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#[idle]
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fn idle(mut cx: idle::Context) -> ! {
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loop {
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// Sleep until next interrupt
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cortex_m::asm::wfi();
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}
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}
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}

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