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HRTIM: Impl CompareEvent for more types
1 parent eafd56e commit 10c1031

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6 files changed

+199
-115
lines changed

6 files changed

+199
-115
lines changed

src/hrtim/adc_trigger.rs

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,3 @@
1-
21
use core::marker::PhantomData;
32

43
pub trait Adc13Trigger {
@@ -17,5 +16,5 @@ pub trait Adc6810Trigger {
1716
const BITS: u32;
1817
}
1918

20-
pub struct TimerReset<T>(pub(crate)PhantomData<T>);
21-
pub struct TimerPeriod<T>(pub(crate)PhantomData<T>);
19+
pub struct TimerReset<T>(pub(crate) PhantomData<T>);
20+
pub struct TimerPeriod<T>(pub(crate) PhantomData<T>);

src/hrtim/capture.rs

Lines changed: 23 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -1,36 +1,33 @@
11
use core::marker::PhantomData;
22

3-
use stm32g4::stm32g474::{
4-
HRTIM_TIMA,
5-
HRTIM_TIMB,
6-
HRTIM_TIMC,
7-
HRTIM_TIMD,
8-
HRTIM_TIME,
9-
HRTIM_TIMF,
10-
};
11-
3+
use stm32g4::stm32g474::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF};
124

135
pub struct Ch1;
146
pub struct Ch2;
157

168
pub struct HrCapt<TIM, PSCL, CH> {
17-
_x: PhantomData<(TIM, PSCL, CH)>
9+
_x: PhantomData<(TIM, PSCL, CH)>,
1810
}
1911

2012
pub enum CountingDirection {
2113
Up = 0,
2214
Down = 1,
2315
}
2416

25-
pub trait CaptureEvent<TIM, PSCL> {
17+
/// Implemented for
18+
/// * TIM's update event
19+
/// * EEVT1-10
20+
/// TODO: This sould be implemeted
21+
/// * All neighbor timers CMP1, CPM2, OUTPUT($CH)_RST and OUTPUT($CH)_SET events
22+
pub trait CaptureEvent<TIM, PSCL, CH> {
2623
const BITS: u32;
2724
}
2825

2926
trait HrCapture {
3027
fn get(&self) -> (u16, CountingDirection);
3128

3229
/// Get number of ticks relative to beginning of upcounting
33-
///
30+
///
3431
/// where captures during down counting count as negative (before the upcount)
3532
fn get_signed(&self) -> i32 {
3633
let (value, dir) = self.get();
@@ -39,7 +36,7 @@ trait HrCapture {
3936
}
4037

4138
/// Get number of ticks relative to beginning of upcounting
42-
///
39+
///
4340
/// where captures during down counting count as larger (after upcount)
4441
fn get_unsigned(&self) -> u32 {
4542
let (value, dir) = self.get();
@@ -52,22 +49,22 @@ macro_rules! impl_capture {
5249
($($TIMX:ident, $CH:ident, $cptXYr:ident, $cptXYcr:ident, $cptXx:ident),+) => {
5350
$(impl<PSCL> HrCapt<$TIMX, PSCL, $CH> {
5451
/// Add event to capture
55-
///
52+
///
5653
/// If multiple events are added, they will be ORed together meaning
5754
/// that a capture will be trigger if any one of the events triggers
58-
pub fn add_event<E: CaptureEvent<$TIMX, PSCL>>(&mut self, _event: &E) {
55+
pub fn add_event<E: CaptureEvent<$TIMX, PSCL, $CH>>(&mut self, _event: &E) {
5956
let tim = unsafe { &*$TIMX::ptr() };
60-
57+
6158
// SAFETY: We are the only one with access to cptXYcr
6259
unsafe {
6360
tim.$cptXYcr.modify(|r, w| w.bits(r.bits() | E::BITS));
6461
}
6562
}
6663

6764
/// Remove event to capture
68-
pub fn remove_event<E: CaptureEvent<$TIMX, PSCL>>(&mut self, _event: &E) {
65+
pub fn remove_event<E: CaptureEvent<$TIMX, PSCL, $CH>>(&mut self, _event: &E) {
6966
let tim = unsafe { &*$TIMX::ptr() };
70-
67+
7168
// SAFETY: We are the only one with access to cptXYcr
7269
unsafe {
7370
tim.$cptXYcr.modify(|r, w| w.bits(r.bits() & !E::BITS));
@@ -78,7 +75,7 @@ macro_rules! impl_capture {
7875
pub fn trigger_now(&mut self) {
7976
// SAFETY: We are the only one with access to cptXYcr
8077
let tim = unsafe { &*$TIMX::ptr() };
81-
78+
8279
tim.$cptXYcr.modify(|_, w| w.swcpt().set_bit());
8380
}
8481
}
@@ -100,21 +97,10 @@ macro_rules! impl_capture {
10097
}
10198

10299
impl_capture!(
103-
HRTIM_TIMA, Ch1, cpt1ar, cpt1acr, cpt1x,
104-
HRTIM_TIMA, Ch2, cpt2ar, cpt2acr, cpt2x,
105-
106-
HRTIM_TIMB, Ch1, cpt1br, cpt1bcr, cpt1x,
107-
HRTIM_TIMB, Ch2, cpt2br, cpt2bcr, cpt2x,
108-
109-
HRTIM_TIMC, Ch1, cpt1cr, cpt1ccr, cpt1x,
110-
HRTIM_TIMC, Ch2, cpt2cr, cpt2ccr, cpt2x,
111-
112-
HRTIM_TIMD, Ch1, cpt1dr, cpt1dcr, cpt1x,
113-
HRTIM_TIMD, Ch2, cpt2dr, cpt2dcr, cpt2x,
114-
115-
HRTIM_TIME, Ch1, cpt1er, cpt1ecr, cpt1x,
116-
HRTIM_TIME, Ch2, cpt2er, cpt2ecr, cpt2x,
117-
118-
HRTIM_TIMF, Ch1, cpt1fr, cpt1fcr, cpt1x,
119-
HRTIM_TIMF, Ch2, cpt2fr, cpt2fcr, cpt2x
120-
);
100+
HRTIM_TIMA, Ch1, cpt1ar, cpt1acr, cpt1x, HRTIM_TIMA, Ch2, cpt2ar, cpt2acr, cpt2x, HRTIM_TIMB,
101+
Ch1, cpt1br, cpt1bcr, cpt1x, HRTIM_TIMB, Ch2, cpt2br, cpt2bcr, cpt2x, HRTIM_TIMC, Ch1, cpt1cr,
102+
cpt1ccr, cpt1x, HRTIM_TIMC, Ch2, cpt2cr, cpt2ccr, cpt2x, HRTIM_TIMD, Ch1, cpt1dr, cpt1dcr,
103+
cpt1x, HRTIM_TIMD, Ch2, cpt2dr, cpt2dcr, cpt2x, HRTIM_TIME, Ch1, cpt1er, cpt1ecr, cpt1x,
104+
HRTIM_TIME, Ch2, cpt2er, cpt2ecr, cpt2x, HRTIM_TIMF, Ch1, cpt1fr, cpt1fcr, cpt1x, HRTIM_TIMF,
105+
Ch2, cpt2fr, cpt2fcr, cpt2x
106+
);

src/hrtim/compare_register.rs

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,6 @@ pub struct HrCr2<TIM, PSCL>(PhantomData<(TIM, PSCL)>);
1414
pub struct HrCr3<TIM, PSCL>(PhantomData<(TIM, PSCL)>);
1515
pub struct HrCr4<TIM, PSCL>(PhantomData<(TIM, PSCL)>);
1616

17-
1817
use super::adc_trigger::Adc13Trigger as Adc13;
1918
use super::adc_trigger::Adc24Trigger as Adc24;
2019
use super::adc_trigger::Adc579Trigger as Adc579;
@@ -41,7 +40,6 @@ macro_rules! hrtim_cr_helper {
4140
};
4241
}
4342

44-
4543
macro_rules! hrtim_cr {
4644
($($TIMX:ident: [
4745
[$cmpX1r:ident, $cmp1x:ident, $(($cr1_trigger:ident: $cr1_trigger_bits:expr)),*],
@@ -58,19 +56,19 @@ macro_rules! hrtim_cr {
5856

5957
hrtim_cr! {
6058
HRTIM_MASTER: [
61-
[mcmp1r,mcmp1, (Adc13: 1 << 0), (Adc24: 1 << 0), (Adc579: 0), (Adc6810: 0) ],
62-
[mcmp2r,mcmp2, (Adc13: 1 << 1), (Adc24: 1 << 1), (Adc579: 1), (Adc6810: 1) ],
63-
[mcmp3r,mcmp3, (Adc13: 1 << 2), (Adc24: 1 << 2), (Adc579: 2), (Adc6810: 2) ],
59+
[mcmp1r,mcmp1, (Adc13: 1 << 0), (Adc24: 1 << 0), (Adc579: 0), (Adc6810: 0) ],
60+
[mcmp2r,mcmp2, (Adc13: 1 << 1), (Adc24: 1 << 1), (Adc579: 1), (Adc6810: 1) ],
61+
[mcmp3r,mcmp3, (Adc13: 1 << 2), (Adc24: 1 << 2), (Adc579: 2), (Adc6810: 2) ],
6462
[mcmp4r,mcmp4, (Adc13: 1 << 3), (Adc24: 1 << 3), (Adc579: 3), (Adc6810: 3) ]
6563
],
66-
64+
6765
HRTIM_TIMA: [
6866
[cmp1ar, cmp1x, ],
6967
[cmp2ar, cmp2x, (Adc24: 1 << 10), (Adc6810: 10)],
7068
[cmp3ar, cmp3x, (Adc13: 1 << 11), (Adc579: 10) ],
7169
[cmp4ar, cmp4x, (Adc13: 1 << 12), (Adc24: 1 << 12), (Adc579: 11), (Adc6810: 11)]
7270
],
73-
71+
7472
HRTIM_TIMB: [
7573
[cmp1br, cmp1x, ],
7674
[cmp2br, cmp2x, (Adc24: 1 << 14), (Adc6810: 13)],

src/hrtim/control.rs

Lines changed: 31 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -214,70 +214,72 @@ use super::adc_trigger::{Adc13Trigger, Adc24Trigger, Adc579Trigger, Adc6810Trigg
214214
impl HrPwmControl {
215215
pub fn enable_adc_trigger1_source<T: Adc13Trigger>(&mut self, _trigger: T) {
216216
let common = unsafe { &*HRTIM_COMMON::ptr() };
217-
unsafe { common.adc1r.modify(|r, w| w.bits(r.bits() | T::BITS)); }
217+
unsafe {
218+
common.adc1r.modify(|r, w| w.bits(r.bits() | T::BITS));
219+
}
218220
}
219221

220222
pub fn enable_adc_trigger2_source<T: Adc24Trigger>(&mut self, _trigger: T) {
221223
let common = unsafe { &*HRTIM_COMMON::ptr() };
222-
unsafe { common.adc2r.modify(|r, w| w.bits(r.bits() | T::BITS)); }
224+
unsafe {
225+
common.adc2r.modify(|r, w| w.bits(r.bits() | T::BITS));
226+
}
223227
}
224228

225229
pub fn enable_adc_trigger3_source<T: Adc13Trigger>(&mut self, _trigger: T) {
226230
let common = unsafe { &*HRTIM_COMMON::ptr() };
227-
unsafe { common.adc3r.modify(|r, w| w.bits(r.bits() | T::BITS)); }
231+
unsafe {
232+
common.adc3r.modify(|r, w| w.bits(r.bits() | T::BITS));
233+
}
228234
}
229235

230236
pub fn enable_adc_trigger4_source<T: Adc24Trigger>(&mut self, _trigger: T) {
231237
let common = unsafe { &*HRTIM_COMMON::ptr() };
232-
unsafe { common.adc4r.modify(|r, w| w.bits(r.bits() | T::BITS)); }
238+
unsafe {
239+
common.adc4r.modify(|r, w| w.bits(r.bits() | T::BITS));
240+
}
233241
}
234242

235243
pub fn enable_adc_trigger5_source<T: Adc579Trigger>(&mut self, _trigger: T) {
236244
let common = unsafe { &*HRTIM_COMMON::ptr() };
237-
common.adcer.modify(|_r, w| {
238-
w.adc5trg()
239-
.variant(T::BITS as u8)
240-
});
245+
common
246+
.adcer
247+
.modify(|_r, w| w.adc5trg().variant(T::BITS as u8));
241248
}
242249

243250
pub fn enable_adc_trigger6_source<T: Adc6810Trigger>(&mut self, _trigger: T) {
244251
let common = unsafe { &*HRTIM_COMMON::ptr() };
245-
common.adcer.modify(|_r, w| {
246-
w.adc6trg()
247-
.variant(T::BITS as u8)
248-
});
252+
common
253+
.adcer
254+
.modify(|_r, w| w.adc6trg().variant(T::BITS as u8));
249255
}
250256

251257
pub fn enable_adc_trigger7_source<T: Adc579Trigger>(&mut self, _trigger: T) {
252258
let common = unsafe { &*HRTIM_COMMON::ptr() };
253-
common.adcer.modify(|_r, w| {
254-
w.adc7trg()
255-
.variant(T::BITS as u8)
256-
});
259+
common
260+
.adcer
261+
.modify(|_r, w| w.adc7trg().variant(T::BITS as u8));
257262
}
258263

259264
pub fn enable_adc_trigger8_source<T: Adc6810Trigger>(&mut self, _trigger: T) {
260265
let common = unsafe { &*HRTIM_COMMON::ptr() };
261-
common.adcer.modify(|_r, w| {
262-
w.adc8trg()
263-
.variant(T::BITS as u8)
264-
});
266+
common
267+
.adcer
268+
.modify(|_r, w| w.adc8trg().variant(T::BITS as u8));
265269
}
266270

267271
pub fn enable_adc_trigger9_source<T: Adc579Trigger>(&mut self, _trigger: T) {
268272
let common = unsafe { &*HRTIM_COMMON::ptr() };
269-
common.adcer.modify(|_r, w| {
270-
w.adc9trg()
271-
.variant(T::BITS as u8)
272-
});
273+
common
274+
.adcer
275+
.modify(|_r, w| w.adc9trg().variant(T::BITS as u8));
273276
}
274277

275278
pub fn enable_adc_trigger10_source<T: Adc6810Trigger>(&mut self, _trigger: T) {
276279
let common = unsafe { &*HRTIM_COMMON::ptr() };
277-
common.adcer.modify(|_r, w| {
278-
w.adc10trg()
279-
.variant(T::BITS as u8)
280-
});
280+
common
281+
.adcer
282+
.modify(|_r, w| w.adc10trg().variant(T::BITS as u8));
281283
}
282284
}
283285

@@ -337,4 +339,4 @@ pub enum SamplingClkDiv {
337339
///
338340
/// fault signal sampling clock f_flts = f_hrtim / 8
339341
Eight = 0b11,
340-
}
342+
}

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