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boondocklabsusbalbin
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Fixes incorrect DMA ISR flag used for transfer error status
In `get_transfer_error_flag()` and `clear_transfer_error_interrupt()` methods, the `TCIF` (transfer complete) bit is being used rather than `TEIF`.
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src/dma/channel.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -208,7 +208,7 @@ impl<I: Instance, const N: u8> Channel for C<I, N> {
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//NOTE(unsafe) Atomic write with no side-effects and we only access the bits
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// that belongs to the ChannelX
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let dma = unsafe { &*I::ptr() };
211-
dma.ifcr().write(|w| w.ctcif(N).set_bit());
211+
dma.ifcr().write(|w| w.cteif(N).set_bit());
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let _ = dma.isr().read();
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let _ = dma.isr().read(); // Delay 2 peripheral clocks
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}
@@ -224,7 +224,7 @@ impl<I: Instance, const N: u8> Channel for C<I, N> {
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fn get_transfer_error_flag(&self) -> bool {
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//NOTE(unsafe) Atomic read with no side effects
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let dma = unsafe { &*I::ptr() };
227-
dma.isr().read().tcif(N).bit_is_set()
227+
dma.isr().read().teif(N).bit_is_set()
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}
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#[inline(always)]

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