Merge branch 'main' into feature/usb

Author: liamkinne

.cargo/config renamed to .cargo/config.toml

@@ -21,6 +21,7 @@ static_assertions = "1.1"
 fugit = "0.3.5"
 stm32-usbd = { version = "0.7.0", optional = true }
 critical-section = "1.1.2"
+fixed = { version = "1.28.0", optional = true }
 
 [dependencies.cortex-m]
 version = "0.7.7"
@@ -94,6 +95,7 @@ log-itm = ["cortex-m-log/itm"]
 log-rtt = []
 log-semihost = ["cortex-m-log/semihosting"]
 defmt-logging = ["defmt"]
+cordic = ["dep:fixed"]
 
 [profile.dev]
 codegen-units = 1
@@ -114,3 +116,7 @@ required-features = ["stm32g474"]
 [[example]]
 name = "usb_serial"
 required-features = ["usb"]
+
+[[example]]
+name = "cordic"
+required-features = ["cordic"]

Cargo.toml

@@ -13,14 +13,6 @@ extern crate cortex_m_rt as rt;
 
 use rt::entry;
 
-#[cfg(not(feature = "stm32g474"))]
-#[entry]
-fn main() -> ! {
-    #[allow(clippy::empty_loop)]
-    loop {} // TODO: add support for more devices
-}
-
-#[cfg(feature = "stm32g474")]
 #[entry]
 fn main() -> ! {
     use hal::comparator::{ComparatorExt, ComparatorSplit, Config, Hysteresis, RefintInput};

examples/comp.rs

@@ -8,14 +8,6 @@ extern crate cortex_m_rt as rt;
 
 use rt::entry;
 
-#[cfg(not(feature = "stm32g474"))]
-#[entry]
-fn main() -> ! {
-    #[allow(clippy::empty_loop)]
-    loop {} // TODO: add support for more devices
-}
-
-#[cfg(feature = "stm32g474")]
 #[entry]
 fn main() -> ! {
     use embedded_hal::Direction;

examples/comp_w_dac.rs

@@ -0,0 +1,57 @@
+#![deny(warnings)]
+#![deny(unsafe_code)]
+#![no_main]
+#![no_std]
+
+extern crate cortex_m;
+extern crate cortex_m_rt as rt;
+extern crate stm32g4xx_hal as hal;
+
+use fixed::types::I1F15;
+use hal::cordic::{
+    func::{dynamic::Mode as _, scale::N0, Magnitude, SinCos, Sqrt},
+    prec::P60,
+    types::{Q15, Q31},
+    Ext as _,
+};
+use hal::prelude::*;
+use hal::pwr::PwrExt;
+use hal::rcc::Config;
+use hal::stm32;
+use rt::entry;
+
+#[macro_use]
+mod utils;
+
+use utils::logger::println;
+
+#[entry]
+fn main() -> ! {
+    let dp = stm32::Peripherals::take().expect("cannot take peripherals");
+    let pwr = dp.PWR.constrain().freeze();
+    let mut rcc = dp.RCC.freeze(Config::hsi(), pwr);
+
+    let mut cordic = dp
+        .CORDIC
+        .constrain(&mut rcc)
+        .freeze::<Q15, Q31, SinCos, P60>(); // 16 bit arguments, 32 bit results, compute sine and cosine, 60 iterations
+
+    // static operation (zero overhead)
+
+    cordic.start(I1F15::from_num(-0.25 /* -45 degreees */));
+
+    let (sin, cos) = cordic.result();
+
+    println!("sin: {}, cos: {}", sin.to_num::<f32>(), cos.to_num::<f32>());
+
+    // dynamic operation
+
+    let mut cordic = cordic.into_dynamic();
+
+    let sqrt = cordic.run::<Sqrt<N0>>(I1F15::from_num(0.25));
+    println!("sqrt: {}", sqrt.to_num::<f32>());
+    let magnitude = cordic.run::<Magnitude>((I1F15::from_num(0.25), I1F15::from_num(0.5)));
+    println!("magnitude: {}", magnitude.to_num::<f32>());
+
+    loop {}
+}

examples/cordic.rs

@@ -5,12 +5,7 @@
 
 use stm32g4xx_hal::adc::AdcClaim;
 use stm32g4xx_hal::adc::ClockSource;
-use stm32g4xx_hal::gpio::gpioa::*;
-use stm32g4xx_hal::gpio::Analog;
-use stm32g4xx_hal::opamp::opamp1::IntoPga as _;
-use stm32g4xx_hal::opamp::opamp2::IntoPga as _;
-use stm32g4xx_hal::opamp::NonInvertingGain;
-use stm32g4xx_hal::opamp::PgaModeInternal;
+use stm32g4xx_hal::opamp::{Gain, InternalOutput};
 use stm32g4xx_hal::prelude::*;
 use stm32g4xx_hal::pwr::PwrExt;
 
@@ -40,32 +35,36 @@ fn main() -> ! {
     let (opamp1, opamp2, opamp3, ..) = dp.OPAMP.split(&mut rcc);
 
     // Set up opamp1 and opamp2 in follower mode
-    let opamp1 = opamp1.follower(gpioa.pa1, Some(gpioa.pa2));
-    let opamp2 = opamp2.follower(gpioa.pa7, Option::<PA6<Analog>>::None);
+    let opamp1 = opamp1.follower(gpioa.pa1, gpioa.pa2);
+    let opamp2 = opamp2.follower(gpioa.pa7, InternalOutput);
 
     // Set up opamp1 and opamp2 in open loop mode
-    let opamp3 = opamp3.open_loop(gpiob.pb0, gpiob.pb2, Some(gpiob.pb1));
+    let opamp3 = opamp3.open_loop(gpiob.pb0, gpiob.pb2, gpiob.pb1);
 
     // disable opamps
-    let (opamp1, pa1, some_pa2) = opamp1.disable();
-    let (opamp2, pa7, _none) = opamp2.disable();
+    let (opamp1, pa1, pa2) = opamp1.disable();
+    let (opamp2, pa7) = opamp2.disable();
 
-    let (_opamp3, _pb0, _pb2, _some_pb1) = opamp3.disable();
+    let (_opamp3, _pb0, _pb2, _pb1) = opamp3.disable();
 
     // Configure opamp1 with pa1 as non-inverting input and set gain to x2
     let _opamp1 = opamp1.pga(
         pa1,
-        PgaModeInternal::gain(NonInvertingGain::Gain2),
-        some_pa2, // Route output to pin pa2
+        pa2, // Route output to pin pa2
+        Gain::Gain2,
     );
 
     // Configure op with pa7 as non-inverting input and set gain to x4
     let opamp2 = opamp2.pga(
         pa7,
-        PgaModeInternal::gain(NonInvertingGain::Gain4),
-        Option::<PA6<Analog>>::None, // Do not route output to any external pin, use internal AD instead
+        InternalOutput, // Do not route output to any external pin, use internal AD instead
+        Gain::Gain4,
     );
 
+    // Lock opamp2. After the opamp is locked its registers cannot be written
+    // until the device is reset (even if using unsafe register accesses).
+    let opamp2 = opamp2.lock();
+
     let mut delay = cp.SYST.delay(&rcc.clocks);
     let mut adc = dp
         .ADC2
@@ -86,8 +85,7 @@ fn main() -> ! {
 
     #[allow(unreachable_code)]
     {
-        let (_opamp1, _pa1, _mode) = _opamp1.disable();
-        let (_opamp2, _pa7, _mode) = opamp2.disable();
+        let (_opamp1, _pin) = _opamp1.disable();
 
         loop {
             delay.delay_ms(100);

examples/opamp.rs

@@ -41,8 +41,8 @@ cfg_if::cfg_if! {
 
         #[allow(unused_macros)]
         macro_rules! println {
-            ($($tt:tt)*) => {
-                log::info!($($tt,)*);
+            ($($arg:tt)+) => {
+                log::info!($($arg)+);
             };
         }
 
@@ -90,8 +90,11 @@ cfg_if::cfg_if! {
 
         #[allow(unused_macros)]
         macro_rules! println {
-            ($($tt:tt)*) => {
-                cortex_m_semihosting::hprintln!($($tt,)*).unwrap();
+            ($s:expr) => {
+                cortex_m_semihosting::hprintln!($s).unwrap();
+            };
+            ($s:expr, $($tt:tt)*) => {
+                cortex_m_semihosting::hprintln!($s, $($tt)*).unwrap();
             };
         }
 

examples/utils/logger.rs

@@ -13,7 +13,7 @@ pub use crate::time::U32Ext as _;
 use crate::{
     dma::{mux::DmaMuxResources, traits::TargetAddress, PeripheralToMemory},
     gpio::*,
-    opamp,
+    opamp::{self, InternalOutput},
     rcc::{Enable, Rcc, Reset},
     signature::{VtempCal130, VtempCal30, VDDA_CALIB},
     stm32,
@@ -144,21 +144,25 @@ macro_rules! adc_pins {
     };
 }
 
-macro_rules! adc_op_pga {
+macro_rules! adc_opamp {
     ($($opamp:ty => ($adc:ident, $chan:expr)),+ $(,)*) => {
         $(
-            impl<A, B> Channel<stm32::$adc> for $opamp {
+            impl<A> Channel<stm32::$adc> for opamp::Follower<$opamp, A, InternalOutput> {
                 type ID = u8;
                 fn channel() -> u8 { $chan }
             }
-        )+
-    };
-}
 
-macro_rules! adc_op_follower {
-    ($($opamp:ty => ($adc:ident, $chan:expr)),+ $(,)*) => {
-        $(
-            impl<A> Channel<stm32::$adc> for $opamp {
+            impl<A, B> Channel<stm32::$adc> for opamp::OpenLoop<$opamp, A, B, InternalOutput> {
+                type ID = u8;
+                fn channel() -> u8 { $chan }
+            }
+
+            impl<A> Channel<stm32::$adc> for opamp::Pga<$opamp, A, InternalOutput> {
+                type ID = u8;
+                fn channel() -> u8 { $chan }
+            }
+
+            impl Channel<stm32::$adc> for opamp::Locked<$opamp, InternalOutput> {
                 type ID = u8;
                 fn channel() -> u8 { $chan }
             }
@@ -2811,21 +2815,13 @@ adc_pins!(
 );
 
 // See https://www.st.com/resource/en/reference_manual/rm0440-stm32g4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf#page=782
-adc_op_pga!(
+adc_opamp!(
     // TODO: Add all opamp types: OpenLoop, Follower(for all opamps)
     // TODO: Should we restrict type parameters A and B?
     // TODO: Also allow AD-channels shared by pins
-    opamp::opamp1::Pga<A, B> => (ADC1, 13),
-    opamp::opamp2::Pga<A, B> => (ADC2, 16),
-
-    opamp::opamp3::Pga<A, B> => (ADC2, 18),
-);
-
-adc_op_follower!(
-    opamp::opamp1::Follower<A> => (ADC1, 13),
-    opamp::opamp2::Follower<A> => (ADC2, 16),
-
-    opamp::opamp3::Follower<A> => (ADC2, 18),
+    opamp::Opamp1 => (ADC1, 13),
+    opamp::Opamp2 => (ADC2, 16),
+    opamp::Opamp3 => (ADC2, 18),
 );
 
 #[cfg(any(
@@ -2836,16 +2832,16 @@ adc_op_follower!(
     feature = "stm32g491",
     feature = "stm32g4a1",
 ))]
-adc_op_pga!(
-    opamp::opamp3::Pga<A, B> => (ADC3, 13),
-    opamp::opamp4::Pga<A, B> => (ADC5, 5),
-    opamp::opamp5::Pga<A, B> => (ADC5, 3),
-    opamp::opamp6::Pga<A, B> => (ADC4, 17),
+adc_opamp!(
+    opamp::Opamp3 => (ADC3, 13),
+    opamp::Opamp4 => (ADC5, 5),
+    opamp::Opamp5 => (ADC5, 3),
+    opamp::Opamp6 => (ADC4, 17),
 );
 
 #[cfg(any(feature = "stm32g491", feature = "stm32g4a1",))]
-adc_op_pga!(
-    opamp::opamp6::Pga<A, B> => (ADC3, 17),
+adc_opamp!(
+    opamp::Opamp6 => (ADC3, 17),
 );
 
 #[cfg(any(feature = "stm32g491", feature = "stm32g4a1",))]