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Add timer events and adc clear interrupts (#99)
* Fix device signature constants, adc dma example * Add timer events and clear adc interrupt
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src/adc.rs

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@@ -2390,6 +2390,12 @@ macro_rules! adc {
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pub fn current_sample(&self) -> u16 {
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self.adc.current_sample()
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}
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/// clear end conversion flag
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#[inline(always)]
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pub fn clear_end_conversion_flag(&mut self) {
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self.adc.clear_end_of_conversion_flag();
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}
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}
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impl Adc<stm32::$adc_type, DMA> {

src/timer.rs

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@@ -51,6 +51,26 @@ pub enum Event {
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TimeOut,
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}
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/// Trigger output source
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pub enum TriggerSource {
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/// Timer reset - UG as trigger output
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Reset,
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/// Timer enable - CNT_EN as trigger output
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Enable = 0b001,
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/// Update event - Update event as trigger output
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Update = 0b010,
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/// Compare Pulse - Positive pulse if CC1IF is setted
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ComparePulse = 0b011,
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/// Compare1 - OC1REFC as trigger output
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Compare1 = 0b100,
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/// Compare2 - OC2REFC as trigger output
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Compare2 = 0b101,
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/// Compare3 - OC3REFC as trigger output
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Compare3 = 0b110,
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/// Compare4 - OC4REFC as trigger output
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Compare4 = 0b111,
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}
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#[derive(Debug, Eq, PartialEq, Copy, Clone)]
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pub enum Error {
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/// CountDownTimer is disabled
@@ -207,6 +227,18 @@ where
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}
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}
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macro_rules! hal_ext_trgo {
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($($TIM:ty: ($tim:ident, $mms:ident),)+) => {
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$(
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impl Timer<$TIM> {
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pub fn set_trigger_source(&mut self, trigger_source: TriggerSource) {
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self.tim.cr2.modify(|_, w| unsafe {w.$mms().bits(trigger_source as u8)});
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}
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}
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)+
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}
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}
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macro_rules! hal {
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($($TIM:ty: ($tim:ident),)+) => {
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$(
@@ -338,6 +370,18 @@ hal! {
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crate::stm32::TIM17: (tim17),
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}
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hal_ext_trgo! {
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crate::stm32::TIM1: (tim1, mms2),
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crate::stm32::TIM2: (tim2, mms2),
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crate::stm32::TIM3: (tim3, mms2),
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crate::stm32::TIM4: (tim4, mms2),
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crate::stm32::TIM6: (tim6, mms),
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crate::stm32::TIM7: (tim7, mms),
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crate::stm32::TIM8: (tim8, mms2),
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crate::stm32::TIM15: (tim15, mms),
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}
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#[cfg(any(
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feature = "stm32g471",
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feature = "stm32g473",

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