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Merge pull request #25 from mgottschlag/logging-fixes
Fix logging in the examples
2 parents 040e5ae + 3accee8 commit 5203be7

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3 files changed

+18
-6
lines changed

3 files changed

+18
-6
lines changed

Cargo.toml

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,10 @@ cortex-m-rtfm = "0.5.1"
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cortex-m-semihosting = "0.3.5"
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panic-semihosting = "0.5.3"
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panic-halt = "0.2.0"
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panic-itm = "0.4.2"
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lazy_static = { version = "1.4", features = ["spin_no_std"] }
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log = "0.4.11"
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cortex-m-log = { version = "0.7", features = ["log-integration"] }
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cfg-if = "0.1.10"
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rtt-target = { version = "0.3.0", features = ["cortex-m"] }
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panic-rtt-target = { version = "0.1.1", features = ["cortex-m"] }
@@ -63,9 +66,9 @@ stm32g483 = ["stm32g4/stm32g483"]
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stm32g484 = ["stm32g4/stm32g484"]
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stm32g491 = ["stm32g4/stm32g491"]
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stm32g4a1 = ["stm32g4/stm32g4a1"]
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log-itm = []
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log-itm = ["cortex-m-log/itm"]
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log-rtt = []
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log-semihost = []
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log-semihost = ["cortex-m-log/semihosting"]
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[profile.dev]
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codegen-units = 1

examples/utils/logger.rs

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#![allow(unsafe_code)]
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cfg_if::cfg_if! {
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if #[cfg(any(feature = "log-itm"))] {
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use panic_itm as _;
@@ -19,7 +20,9 @@ cfg_if::cfg_if! {
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level: LevelFilter::Info,
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inner: unsafe {
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InterruptSync::new(
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ItmDest::new(cortex_m::Peripherals::steal().ITM)
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// We must not use Peripherals::steal() here to get an ITM instance, as the
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// code might expect to be able to call Peripherals::take() later on.
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ItmDest::new(core::mem::transmute(()))
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)
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},
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};

openocd.cfg

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,10 +3,16 @@
33
source [find interface/stlink.cfg]
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source [find target/stm32g4x.cfg]
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6+
reset_config srst_only srst_nogate
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init
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reset halt
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stm32g4x unlock 0
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reset halt
9-
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reset_config srst_only srst_nogate
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init
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flash probe 0
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# Uncomment the following lines for ITM logging to "itm.fifo" and adapt core
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# clock (16MHz by default) and pin frequency if necessary:
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#stm32g4x.tpiu configure -protocol uart -traceclk 16000000 -pin-freq 8000000 -output itm.fifo -formatter off
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#stm32g4x.tpiu enable
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#itm ports on

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