@@ -346,15 +346,15 @@ impl<I: Instance, const N: u8> Channel for C<I, N> {
346346 fn get_half_transfer_flag ( & self ) -> bool {
347347 //NOTE(unsafe) Atomic read with no side effects
348348 let dma = unsafe { & * I :: ptr ( ) } ;
349- dma. isr ( ) . read ( ) . htif ( N as u8 ) . bit_is_set ( )
349+ dma. isr ( ) . read ( ) . htif ( N ) . bit_is_set ( )
350350 }
351351
352352 #[ inline( always) ]
353353 fn clear_half_transfer_interrupt ( & mut self ) {
354354 //NOTE(unsafe) Atomic write with no side-effects and we only access the bits
355355 // that belongs to the ChannelX
356356 let dma = unsafe { & * I :: ptr ( ) } ;
357- dma. ifcr ( ) . write ( |w| w. chtif ( N as u8 ) . set_bit ( ) ) ;
357+ dma. ifcr ( ) . write ( |w| w. chtif ( N ) . set_bit ( ) ) ;
358358 let _ = dma. isr ( ) . read ( ) ;
359359 let _ = dma. isr ( ) . read ( ) ; // Delay 2 peripheral clocks
360360 }
@@ -446,7 +446,7 @@ impl<I: Instance, const N: u8> C<I, N> {
446446 //NOTE(unsafe) Atomic write with no side-effects and we only access the bits
447447 // that belongs to the ChannelX
448448 let dma = unsafe { & * I :: ptr ( ) } ;
449- dma. ifcr ( ) . write ( |w| w. chtif ( N as u8 ) . set_bit ( ) ) ;
449+ dma. ifcr ( ) . write ( |w| w. chtif ( N ) . set_bit ( ) ) ;
450450 let _ = dma. isr ( ) . read ( ) ;
451451 let _ = dma. isr ( ) . read ( ) ; // Delay 2 peripheral clocks
452452 }
@@ -455,7 +455,7 @@ impl<I: Instance, const N: u8> C<I, N> {
455455 pub fn get_half_transfer_flag ( ) -> bool {
456456 //NOTE(unsafe) Atomic read with no side effects
457457 let dma = unsafe { & * I :: ptr ( ) } ;
458- dma. isr ( ) . read ( ) . htif ( N as u8 ) . bit_is_set ( )
458+ dma. isr ( ) . read ( ) . htif ( N ) . bit_is_set ( )
459459 }
460460
461461 #[ inline( always) ]
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