@@ -12,6 +12,7 @@ use crate::stm32::*;
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use cortex_m:: interrupt;
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use nb:: block;
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+ use embedded_io:: { ReadReady , WriteReady } ;
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use crate :: serial:: config:: * ;
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/// Serial error
@@ -27,6 +28,17 @@ pub enum Error {
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Parity ,
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}
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+ impl embedded_io:: Error for Error {
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+ fn kind ( & self ) -> embedded_io:: ErrorKind {
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+ match self {
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+ Error :: Framing => embedded_io:: ErrorKind :: InvalidData ,
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+ Error :: Noise => embedded_io:: ErrorKind :: InvalidData ,
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+ Error :: Overrun => embedded_io:: ErrorKind :: Other ,
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+ Error :: Parity => embedded_io:: ErrorKind :: InvalidData ,
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+ }
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+ }
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+ }
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+
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/// Interrupt event
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pub enum Event {
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/// TXFIFO reaches the threshold
@@ -202,6 +214,29 @@ macro_rules! uart_shared {
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_dma: PhantomData ,
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}
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}
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+ fn data_ready( & mut self ) -> nb:: Result <( ) , Error > {
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+ let usart = unsafe { & ( * $USARTX:: ptr( ) ) } ;
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+ let isr = usart. isr. read( ) ;
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+ Err (
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+ if isr. pe( ) . bit_is_set( ) {
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+ usart. icr. write( |w| w. pecf( ) . set_bit( ) ) ;
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+ nb:: Error :: Other ( Error :: Parity )
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+ } else if isr. fe( ) . bit_is_set( ) {
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+ usart. icr. write( |w| w. fecf( ) . set_bit( ) ) ;
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+ nb:: Error :: Other ( Error :: Framing )
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+ } else if isr. nf( ) . bit_is_set( ) {
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+ usart. icr. write( |w| w. ncf( ) . set_bit( ) ) ;
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+ nb:: Error :: Other ( Error :: Noise )
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+ } else if isr. ore( ) . bit_is_set( ) {
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+ usart. icr. write( |w| w. orecf( ) . set_bit( ) ) ;
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+ nb:: Error :: Other ( Error :: Overrun )
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+ } else if isr. rxne( ) . bit_is_set( ) {
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+ return Ok ( ( ) )
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+ } else {
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+ nb:: Error :: WouldBlock
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+ }
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+ )
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+ }
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}
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impl <Pin > Rx <$USARTX, Pin , DMA > {
@@ -225,26 +260,7 @@ macro_rules! uart_shared {
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fn read( & mut self ) -> nb:: Result <u8 , Error > {
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let usart = unsafe { & ( * $USARTX:: ptr( ) ) } ;
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- let isr = usart. isr. read( ) ;
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- Err (
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- if isr. pe( ) . bit_is_set( ) {
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- usart. icr. write( |w| w. pecf( ) . set_bit( ) ) ;
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- nb:: Error :: Other ( Error :: Parity )
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- } else if isr. fe( ) . bit_is_set( ) {
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- usart. icr. write( |w| w. fecf( ) . set_bit( ) ) ;
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- nb:: Error :: Other ( Error :: Framing )
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- } else if isr. nf( ) . bit_is_set( ) {
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- usart. icr. write( |w| w. ncf( ) . set_bit( ) ) ;
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- nb:: Error :: Other ( Error :: Noise )
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- } else if isr. ore( ) . bit_is_set( ) {
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- usart. icr. write( |w| w. orecf( ) . set_bit( ) ) ;
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- nb:: Error :: Other ( Error :: Overrun )
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- } else if isr. rxne( ) . bit_is_set( ) {
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- return Ok ( usart. rdr. read( ) . bits( ) as u8 )
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- } else {
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- nb:: Error :: WouldBlock
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- }
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- )
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+ self . data_ready( ) . map( |_| usart. rdr. read( ) . bits( ) as u8 )
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}
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}
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@@ -349,6 +365,91 @@ macro_rules! uart_shared {
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}
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}
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+ impl <Pin > embedded_io:: ErrorType for Tx <$USARTX, Pin , NoDMA > {
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+ type Error = Error ;
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+ }
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+ impl <Pin > WriteReady for Tx <$USARTX, Pin , NoDMA > {
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+ fn write_ready( & mut self ) -> Result <bool , Self :: Error > {
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+ let usart = unsafe { & ( * $USARTX:: ptr( ) ) } ;
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+ Ok ( usart. isr. read( ) . txe( ) . bit_is_set( ) )
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+ }
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+ }
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+ // writes until fifo (or tdr) is full
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+ impl <Pin > embedded_io:: Write for Tx <$USARTX, Pin , NoDMA > {
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+ fn write( & mut self , buf: & [ u8 ] ) -> Result <usize , Self :: Error > {
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+ if buf. len( ) == 0 { return Ok ( 0 ) }
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+ let usart = unsafe { & ( * $USARTX:: ptr( ) ) } ;
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+ while !self . write_ready( ) ? {
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+ core:: hint:: spin_loop( )
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+ }
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+ // can't know fifo capacity in advance
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+ let count = buf. into_iter( )
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+ . take_while( |_| usart. isr. read( ) . txe( ) . bit_is_set( ) )
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+ . map( |b| usart. tdr. write( |w| unsafe { w. tdr( ) . bits( * b as u16 ) } ) )
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+ . count( ) ;
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+
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+ Ok ( count)
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+ }
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+ fn flush( & mut self ) -> Result <( ) , Error > {
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+ nb:: block!( hal:: serial:: Write :: <u8 >:: flush( self ) )
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+ }
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+ }
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+
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+ impl <Pin > embedded_io:: ErrorType for Rx <$USARTX, Pin , NoDMA > {
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+ type Error = Error ;
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+ }
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+ impl <Pin > ReadReady for Rx <$USARTX, Pin , NoDMA > {
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+ fn read_ready( & mut self ) -> Result <bool , Self :: Error > {
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+ match self . data_ready( ) {
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+ Ok ( ( ) ) => Ok ( true ) ,
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+ Err ( nb:: Error :: WouldBlock ) => Ok ( false ) ,
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+ Err ( nb:: Error :: Other ( e) ) => Err ( e) ,
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+ }
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+ }
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+ }
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+ impl <Pin > embedded_io:: Read for Rx <$USARTX, Pin , NoDMA > {
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+ fn read( & mut self , buf: & mut [ u8 ] ) -> Result <usize , Self :: Error > {
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+ if buf. len( ) == 0 { return Ok ( 0 ) }
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+ let usart = unsafe { & ( * $USARTX:: ptr( ) ) } ;
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+ let mut count = 0 ;
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+
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+ while !self . read_ready( ) ? {
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+ core:: hint:: spin_loop( )
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+ }
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+ while self . read_ready( ) ? && count < buf. len( ) {
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+ buf[ count] = usart. rdr. read( ) . bits( ) as u8 ;
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+ count += 1
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+ }
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+ Ok ( count)
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+ }
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+ }
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+
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+ impl <TX , RX > embedded_io:: ErrorType for Serial <$USARTX, TX , RX > {
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+ type Error = Error ;
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+ }
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+ impl <TX , RX > WriteReady for Serial <$USARTX, TX , RX > {
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+ fn write_ready( & mut self ) -> Result <bool , Self :: Error > {
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+ self . tx. write_ready( )
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+ }
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+ }
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+ impl <TX , RX > embedded_io:: Write for Serial <$USARTX, TX , RX > {
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+ fn write( & mut self , buf: & [ u8 ] ) -> Result <usize , Self :: Error > {
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+ embedded_io:: Write :: write( & mut self . tx, buf)
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+ }
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+ fn flush( & mut self ) -> Result <( ) , Error > {
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+ embedded_io:: Write :: flush( & mut self . tx)
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+ }
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+ }
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+ impl <TX , RX > ReadReady for Serial <$USARTX, TX , RX > {
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+ fn read_ready( & mut self ) -> Result <bool , Self :: Error > {
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+ self . rx. read_ready( )
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+ }
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+ }
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+ impl <TX , RX > embedded_io:: Read for Serial <$USARTX, TX , RX > {
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+ fn read( & mut self , buf: & mut [ u8 ] ) -> Result <usize , Self :: Error > {
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+ embedded_io:: Read :: read( & mut self . rx, buf)
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+ }
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+ }
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impl <TX , RX > Serial <$USARTX, TX , RX > {
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