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Handle possible race between SR and DR register reads per RM0440 26.7.3 RNDATA description
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src/rng.rs

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -136,6 +136,12 @@ impl Rng<Running> {
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///
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/// Returns an [`RngError`] if the RNG is not ready or reports an error condition.
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///
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/// Once the RNG is ready, 4 consecutive 32 bit reads can be performed without blocking,
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/// at which point the internal FIFO will be refilled after 216 periods of the AHB clock
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/// (RM0440 26.7.3)
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///
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/// While the RNG is filling the FIFO, the function will return [`RngError::NotReady`].
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///
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/// For blocking reads use [`read_blocking()`]
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pub fn read_non_blocking(&self) -> Result<u32, RngError> {
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// Read the SR register to check if there is an error condition,
@@ -153,7 +159,10 @@ impl Rng<Running> {
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if status.drdy().bit_is_set() {
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// Data is ready. Read the DR register and return the value.
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Ok(unsafe { (*RNG::ptr()).dr().read().bits() })
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match unsafe { (*RNG::ptr()).dr().read().bits() } {
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0 => Err(RngError::SeedError),
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data => Ok(data),
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}
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} else {
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Err(RngError::NotReady)
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}

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