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rcc::Enable and cleans
1 parent 5308cce commit 9d366b9

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18 files changed

+220
-207
lines changed

18 files changed

+220
-207
lines changed

‎examples/can-echo.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use crate::hal::{
66
gpio::{GpioExt as _, Speed},
77
nb::block,
88
pwr::PwrExt,
9-
rcc::{Config, RccExt, SysClockSrc},
9+
rcc::{Config, RccExt},
1010
stm32::Peripherals,
1111
time::RateExtU32,
1212
};
@@ -49,7 +49,7 @@ fn main() -> ! {
4949

5050
let pwr = dp.PWR.constrain().freeze();
5151
let rcc = dp.RCC.constrain();
52-
let mut rcc = rcc.freeze(Config::new(SysClockSrc::HSE(24.MHz())), pwr);
52+
let mut rcc = rcc.freeze(Config::hse(24.MHz()), pwr);
5353

5454
info!("Split GPIO");
5555

@@ -61,7 +61,7 @@ fn main() -> ! {
6161
let tx = gpiob.pb9.into_alternate().speed(Speed::VeryHigh);
6262

6363
info!("-- Create CAN 1 instance");
64-
let mut can = dp.FDCAN1.fdcan(tx, rx, &rcc);
64+
let mut can = dp.FDCAN1.fdcan(tx, rx, &mut rcc);
6565
can.set_protocol_exception_handling(false);
6666

6767
info!("-- Configure nominal timing");

‎examples/i2c-mpu6050.rs‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@
33
#![no_main]
44
#![no_std]
55

6-
use hal::i2c::Config;
76
use hal::prelude::*;
87
use hal::stm32;
98
use hal::time::{ExtU32, RateExtU32};
@@ -29,7 +28,7 @@ fn main() -> ! {
2928
let sda = gpiob.pb9.into_alternate_open_drain();
3029
let scl = gpiob.pb8.into_alternate_open_drain();
3130

32-
let i2c = dp.I2C1.i2c(sda, scl, Config::new(100.kHz()), &mut rcc);
31+
let i2c = dp.I2C1.i2c(sda, scl, 100.kHz(), &mut rcc);
3332

3433
let mut mpu = Mpu6050::new(i2c);
3534
let mut delay = cp.SYST.delay(&rcc.clocks);

‎examples/i2c.rs‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@
33
#![no_main]
44
#![no_std]
55

6-
use hal::i2c::Config;
76
use hal::prelude::*;
87
use hal::stm32;
98
use hal::time::RateExtU32;
@@ -26,7 +25,7 @@ fn main() -> ! {
2625
let sda = gpiob.pb9.into_alternate_open_drain();
2726
let scl = gpiob.pb8.into_alternate_open_drain();
2827

29-
let mut i2c = dp.I2C1.i2c(sda, scl, Config::new(40.kHz()), &mut rcc);
28+
let mut i2c = dp.I2C1.i2c(sda, scl, 40.kHz(), &mut rcc);
3029
// Alternatively, it is possible to specify the exact timing as follows (see the documentation
3130
// of with_timing() for an explanation of the constant):
3231
//let mut i2c = dp

‎src/adc/mod.rs‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,8 @@ fn init_adc_common<ADCC: AdcCommonExt>(
5050
let cfg = cfg.to_bits(rcc);
5151

5252
unsafe {
53-
let rcc_ptr = &(*stm32::RCC::ptr());
54-
ADCC::enable(rcc_ptr);
55-
ADCC::reset(rcc_ptr);
53+
ADCC::enable_unchecked();
54+
ADCC::reset_unchecked();
5655
}
5756

5857
// Select system clock as ADC clock source

‎src/can.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,13 +33,13 @@ where
3333
self,
3434
_tx: TX,
3535
_rx: RX,
36-
rcc: &Rcc,
36+
rcc: &mut Rcc,
3737
) -> fdcan::FdCan<Can<Self>, fdcan::ConfigMode>
3838
where
3939
TX: sealed::Tx<Self>,
4040
RX: sealed::Rx<Self>,
4141
{
42-
Self::enable(&rcc.rb);
42+
Self::enable(rcc);
4343

4444
self.fdcan_unchecked()
4545
}

‎src/dac.rs‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@ use crate::gpio::{Analog, PA4, PA5, PA6};
1313
use crate::pac;
1414
use crate::rcc::{self, *};
1515
use crate::stm32::dac1::mcr::HFSEL;
16-
use crate::stm32::RCC;
1716
use embedded_hal::delay::DelayNs;
1817

1918
pub trait DacOut<V> {
@@ -463,9 +462,8 @@ impl<DAC: Instance> DacExt for DAC {
463462
PINS: Pins<Self>,
464463
{
465464
unsafe {
466-
let rcc_ptr = &(*RCC::ptr());
467-
Self::enable(rcc_ptr);
468-
Self::reset(rcc_ptr);
465+
Self::enable_unchecked();
466+
Self::reset_unchecked();
469467
}
470468

471469
#[allow(clippy::uninit_assumed_init)]

‎src/delay.rs‎

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -119,17 +119,12 @@ impl DelayMs<u8> for SystDelay {
119119
}
120120

121121
pub trait DelayExt {
122-
fn delay<T>(&mut self, delay: T)
123-
where
124-
T: Into<MicroSecond>;
122+
fn delay(&mut self, delay: MicroSecond);
125123
}
126124

127125
impl DelayExt for SystDelay {
128-
fn delay<T>(&mut self, delay: T)
129-
where
130-
T: Into<MicroSecond>,
131-
{
132-
self.0.delay_us(delay.into().ticks())
126+
fn delay(&mut self, delay: MicroSecond) {
127+
self.0.delay_us(delay.ticks())
133128
}
134129
}
135130

‎src/gpio.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -582,8 +582,8 @@ macro_rules! gpio {
582582
type Parts = Parts;
583583

584584
fn split(self, rcc: &mut Rcc) -> Parts {
585-
Self::enable(&rcc.rb);
586-
Self::reset(&rcc.rb);
585+
Self::enable(rcc);
586+
Self::reset(rcc);
587587

588588
Parts {
589589
$(

‎src/i2c.rs‎

Lines changed: 31 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ use crate::rcc::{Enable, GetBusFreq, Rcc, RccBus, Reset};
1212
feature = "stm32g484"
1313
))]
1414
use crate::stm32::I2C4;
15-
use crate::stm32::{I2C1, I2C2, I2C3, RCC};
15+
use crate::stm32::{I2C1, I2C2, I2C3};
1616
use crate::time::Hertz;
1717
use core::cmp;
1818
use core::convert::TryInto;
@@ -29,12 +29,9 @@ pub struct Config {
2929

3030
impl Config {
3131
/// Creates a default configuration for the given bus frequency.
32-
pub fn new<T>(speed: T) -> Self
33-
where
34-
T: Into<Hertz>,
35-
{
32+
pub fn new(speed: Hertz) -> Self {
3633
Config {
37-
speed: Some(speed.into()),
34+
speed: Some(speed),
3835
timing: None,
3936
analog_filter: true,
4037
digital_filter: 0,
@@ -98,16 +95,17 @@ impl Config {
9895
(psc, scll, sclh, sdadel, scldel)
9996
};
10097

101-
reg.presc()
102-
.set(psc.try_into().unwrap())
103-
.scldel()
104-
.set(scldel)
105-
.sdadel()
106-
.set(sdadel)
107-
.sclh()
108-
.set(sclh.try_into().unwrap())
109-
.scll()
110-
.set(scll.try_into().unwrap())
98+
reg.presc().set(psc.try_into().unwrap());
99+
reg.scldel().set(scldel);
100+
reg.sdadel().set(sdadel);
101+
reg.sclh().set(sclh.try_into().unwrap());
102+
reg.scll().set(scll.try_into().unwrap())
103+
}
104+
}
105+
106+
impl From<Hertz> for Config {
107+
fn from(value: Hertz) -> Self {
108+
Self::new(value)
111109
}
112110
}
113111

@@ -149,7 +147,13 @@ impl embedded_hal::i2c::Error for Error {
149147
}
150148

151149
pub trait I2cExt<I2C> {
152-
fn i2c<SDA, SCL>(self, sda: SDA, scl: SCL, config: Config, rcc: &mut Rcc) -> I2c<I2C, SDA, SCL>
150+
fn i2c<SDA, SCL>(
151+
self,
152+
sda: SDA,
153+
scl: SCL,
154+
config: impl Into<Config>,
155+
rcc: &mut Rcc,
156+
) -> I2c<I2C, SDA, SCL>
153157
where
154158
SDA: SDAPin<I2C>,
155159
SCL: SCLPin<I2C>;
@@ -216,7 +220,7 @@ macro_rules! i2c {
216220
self,
217221
sda: SDA,
218222
scl: SCL,
219-
config: Config,
223+
config: impl Into<Config>,
220224
rcc: &mut Rcc,
221225
) -> I2c<$I2CX, SDA, SCL>
222226
where
@@ -232,16 +236,16 @@ macro_rules! i2c {
232236
SCL: SCLPin<$I2CX>
233237
{
234238
/// Initializes the I2C peripheral.
235-
pub fn $i2cx(i2c: $I2CX, sda: SDA, scl: SCL, config: Config, rcc: &mut Rcc) -> Self
239+
pub fn $i2cx(i2c: $I2CX, sda: SDA, scl: SCL, config: impl Into<Config>, rcc: &mut Rcc) -> Self
236240
where
237241
SDA: SDAPin<$I2CX>,
238242
SCL: SCLPin<$I2CX>,
239243
{
244+
let config = config.into();
240245
// Enable and reset I2C
241246
unsafe {
242-
let rcc_ptr = &(*RCC::ptr());
243-
$I2CX::enable(rcc_ptr);
244-
$I2CX::reset(rcc_ptr);
247+
$I2CX::enable_unchecked();
248+
$I2CX::reset_unchecked();
245249
}
246250

247251
// Make sure the I2C unit is disabled so we can configure it
@@ -252,12 +256,9 @@ macro_rules! i2c {
252256

253257
// Enable the I2C processing
254258
i2c.cr1().modify(|_, w| {
255-
w.pe()
256-
.set_bit()
257-
.dnf()
258-
.set(config.digital_filter)
259-
.anfoff()
260-
.bit(!config.analog_filter)
259+
w.pe().set_bit();
260+
w.dnf().set(config.digital_filter);
261+
w.anfoff().bit(!config.analog_filter)
261262
});
262263

263264
I2c { i2c, sda, scl }
@@ -267,9 +268,8 @@ macro_rules! i2c {
267268
pub fn release(self) -> ($I2CX, SDA, SCL) {
268269
// Disable I2C.
269270
unsafe {
270-
let rcc_ptr = &(*RCC::ptr());
271-
$I2CX::reset(rcc_ptr);
272-
$I2CX::disable(rcc_ptr);
271+
$I2CX::reset_unchecked();
272+
$I2CX::disable_unchecked();
273273
}
274274

275275
(self.i2c, self.sda, self.scl)

‎src/pwm.rs‎

Lines changed: 6 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,6 @@ use core::marker::PhantomData;
173173
use core::mem::MaybeUninit;
174174

175175
use crate::stm32::LPTIMER1;
176-
use crate::stm32::RCC;
177176
#[cfg(any(
178177
feature = "stm32g473",
179178
feature = "stm32g474",
@@ -1148,9 +1147,8 @@ macro_rules! tim_hal {
11481147
PINS: Pins<$TIMX, T, U>,
11491148
{
11501149
unsafe {
1151-
let rcc_ptr = &(*RCC::ptr());
1152-
$TIMX::enable(rcc_ptr);
1153-
$TIMX::reset(rcc_ptr);
1150+
$TIMX::enable_unchecked();
1151+
$TIMX::reset_unchecked();
11541152
}
11551153

11561154
let clk = $TIMX::get_timer_frequency(&rcc.clocks);
@@ -1190,9 +1188,8 @@ macro_rules! tim_hal {
11901188
PINS: Pins<Self, CHANNEL, COMP>
11911189
{
11921190
unsafe {
1193-
let rcc_ptr = &(*RCC::ptr());
1194-
$TIMX::enable(rcc_ptr);
1195-
$TIMX::reset(rcc_ptr);
1191+
$TIMX::enable_unchecked();
1192+
$TIMX::reset_unchecked();
11961193
}
11971194

11981195
let clk = $TIMX::get_timer_frequency(&rcc.clocks).raw();
@@ -1802,9 +1799,8 @@ macro_rules! lptim_hal {
18021799
PINS: Pins<$TIMX, T, U>,
18031800
{
18041801
unsafe {
1805-
let rcc_ptr = &(*RCC::ptr());
1806-
$TIMX::enable(rcc_ptr);
1807-
$TIMX::reset(rcc_ptr);
1802+
$TIMX::enable_unchecked();
1803+
$TIMX::reset_unchecked();
18081804
}
18091805

18101806
let clk = $TIMX::get_timer_frequency(&rcc.clocks);

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