Merge pull request #75 from usbalbin/opamp_pga

Opamp pga-mode

Author: no111u3

examples/opamp.rs

@@ -0,0 +1,92 @@
+//! Integrated opamps.
+
+#![no_std]
+#![no_main]
+
+use stm32g4xx_hal::adc::AdcClaim;
+use stm32g4xx_hal::adc::ClockSource;
+use stm32g4xx_hal::gpio::gpioa::*;
+use stm32g4xx_hal::gpio::Analog;
+use stm32g4xx_hal::opamp::opamp1::IntoPga as _;
+use stm32g4xx_hal::opamp::opamp2::IntoPga as _;
+use stm32g4xx_hal::opamp::NonInvertingGain;
+use stm32g4xx_hal::opamp::PgaModeInternal;
+use stm32g4xx_hal::prelude::*;
+
+use utils::logger::info;
+
+#[macro_use]
+mod utils;
+
+#[cortex_m_rt::entry]
+fn main() -> ! {
+    utils::logger::init();
+
+    // take peripherals
+    let dp = stm32g4xx_hal::stm32::Peripherals::take().unwrap();
+    let cp = cortex_m::Peripherals::take().expect("cannot take core peripherals");
+
+    // setup clock
+    let config = stm32g4xx_hal::rcc::Config::hsi();
+    let mut rcc = dp.RCC.freeze(config);
+
+    // split gpio
+    let gpioa = dp.GPIOA.split(&mut rcc);
+    let gpiob = dp.GPIOB.split(&mut rcc);
+
+    // setup opamps
+    let (opamp1, opamp2, opamp3, ..) = dp.OPAMP.split(&mut rcc);
+
+    // Set up opamp1 and opamp2 in follower mode
+    let opamp1 = opamp1.follower(gpioa.pa1, Some(gpioa.pa2));
+    let opamp2 = opamp2.follower(gpioa.pa7, Option::<PA6<Analog>>::None);
+
+    // Set up opamp1 and opamp2 in open loop mode
+    let opamp3 = opamp3.open_loop(gpiob.pb0, gpiob.pb2, Some(gpiob.pb1));
+
+    // disable opamps
+    let (opamp1, pa1, some_pa2) = opamp1.disable();
+    let (opamp2, pa7, _none) = opamp2.disable();
+
+    let (_opamp3, _pb0, _pb2, _some_pb1) = opamp3.disable();
+
+    // Configure opamp1 with pa1 as non-inverting input and set gain to x2
+    let _opamp1 = opamp1.pga(
+        pa1,
+        PgaModeInternal::gain(NonInvertingGain::Gain2),
+        some_pa2, // Route output to pin pa2
+    );
+
+    // Configure op with pa7 as non-inverting input and set gain to x4
+    let mut opamp2 = opamp2.pga(
+        pa7,
+        PgaModeInternal::gain(NonInvertingGain::Gain4),
+        Option::<PA6<Analog>>::None, // Do not route output to any external pin, use internal AD instead
+    );
+
+    let mut delay = cp.SYST.delay(&rcc.clocks);
+    let mut adc = dp
+        .ADC2
+        .claim(ClockSource::SystemClock, &rcc, &mut delay, true);
+
+    loop {
+        // Here we can sample the output of opamp2 as if it was a regular AD pin
+        let sample = adc.convert(
+            &mut opamp2,
+            stm32g4xx_hal::adc::config::SampleTime::Cycles_640_5,
+        );
+
+        let millivolts = adc.sample_to_millivolts(sample);
+        info!("opamp2 thus 4x pa7: {}mV", millivolts);
+
+        delay.delay_ms(100);
+    }
+
+    #[allow(unreachable_code)]
+    {
+        let (_opamp1, _pa1, _mode, _some_pa2) = _opamp1.disable();
+        let (_opamp2, _pa7, _mode, _none) = opamp2.disable();
+
+        loop {}
+    }
+}

src/adc.rs

@@ -13,6 +13,7 @@ pub use crate::time::U32Ext as _;
 use crate::{
     dma::{mux::DmaMuxResources, traits::TargetAddress, PeripheralToMemory},
     gpio::*,
+    opamp,
     rcc::{Enable, Rcc, Reset},
     signature::{VtempCal110, VtempCal30, VDDA_CALIB},
     stm32,
@@ -66,6 +67,17 @@ macro_rules! adc_pins {
     };
 }
 
+macro_rules! adc_op {
+    ($($opamp:ty => ($adc:ident, $chan:expr)),+ $(,)*) => {
+        $(
+            impl<A, B> Channel<stm32::$adc> for $opamp {
+                type ID = u8;
+                fn channel() -> u8 { $chan }
+            }
+        )+
+    };
+}
+
 /// Contains types related to ADC configuration
 pub mod config {
     use embedded_hal::adc::Channel;
@@ -2338,6 +2350,28 @@ adc_pins!(
     Vref => (ADC5, 18),
 );
 
+// See https://www.st.com/resource/en/reference_manual/rm0440-stm32g4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf#page=782
+adc_op!(
+    // TODO: Add all opamp types: Follower, OpenLoop
+    // TODO: Should we restrict type parameters A and B?
+    // TODO: Also allow AD-channels shared by pins
+    opamp::opamp1::Pga<A, B> => (ADC1, 13),
+    opamp::opamp2::Pga<A, B> => (ADC2, 16),
+    opamp::opamp3::Pga<A, B> => (ADC2, 18),
+);
+
+#[cfg(any(
+    feature = "stm32g473",
+    feature = "stm32g474",
+    feature = "stm32g483",
+    feature = "stm32g484",
+))]
+adc_op!(
+    opamp::opamp4::Pga<A, B> => (ADC5, 5),
+    opamp::opamp5::Pga<A, B> => (ADC5, 3),
+    opamp::opamp6::Pga<A, B> => (ADC4, 17),
+);
+
 #[cfg(any(feature = "stm32g491", feature = "stm32g4a1",))]
 adc_pins!(
     gpioa::PA0<Analog> => (ADC1, 1),