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EEV
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examples/hrtim_eev.rs

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//This example puts the timer in PWM mode using the specified pin with a frequency of 100Hz and a duty cycle of 50%.
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#![no_main]
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#![no_std]
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use cortex_m_rt::entry;
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use fugit::ExtU32;
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use hal::gpio::gpioa::PA8;
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use hal::gpio::Alternate;
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use hal::gpio::AF13;
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use hal::prelude::*;
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use hal::pwm::hrtim::EventSource;
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use hal::pwm::hrtim::FaultAction;
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use hal::pwm::hrtim::HrCompareRegister;
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use hal::pwm::hrtim::HrPwmAdvExt;
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use hal::pwm::hrtim::HrTimer;
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use hal::pwm::hrtim::Pscl4;
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use hal::pwm::hrtim::{HrControltExt, HrOutput};
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use hal::pwm::FaultMonitor;
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use hal::rcc;
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use hal::stm32;
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use stm32g4xx_hal as hal;
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//mod utils;
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use defmt_rtt as _; // global logger
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use panic_probe as _;
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#[entry]
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fn main() -> ! {
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let dp = stm32::Peripherals::take().expect("cannot take peripherals");
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let cp = stm32::CorePeripherals::take().expect("cannot take core");
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// Set system frequency to 16MHz * 75/4/2 = 150MHz
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// This would lead to HrTim running at 150MHz * 32 = 4.8GHz...
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let mut rcc = dp.RCC.freeze(rcc::Config::pll().pll_cfg(rcc::PllConfig {
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mux: rcc::PLLSrc::HSI,
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n: rcc::PllNMul::MUL_75,
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m: rcc::PllMDiv::DIV_4,
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r: Some(rcc::PllRDiv::DIV_2),
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..Default::default()
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}));
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let mut delay = cp.SYST.delay(&rcc.clocks);
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let gpioa = dp.GPIOA.split(&mut rcc);
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let gpiob = dp.GPIOB.split(&mut rcc);
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let (mut fault_control, flt_inputs, eev_inputs) =
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dp.HRTIM_COMMON.hr_control(&mut rcc).wait_for_calibration();
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let eev_input3 = eev_inputs
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.eev_input3
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.bind_pin(gpiob.pb7.into_pull_down_input())
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.polarity(hal::pwm::Polarity::ActiveHigh)
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.finalize(&mut fault_control);
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// ...with a prescaler of 4 this gives us a HrTimer with a tick rate of 1.2GHz
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// With max the max period set, this would be 1.2GHz/2^16 ~= 18kHz...
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let prescaler = Pscl4;
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let pin_a: PA8<Alternate<AF13>> = gpioa.pa8.into_alternate();
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// . . . *
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// . 33% . . * . .
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// .-----. .-----. .--. . .
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//out1 | | | | | | . .
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// | | | | | | . .
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// ------ ----------- ----------- -----------------------------------
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// . . . * . .
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// . . . * . .
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// . . . *-------- . .
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//fault . . . | | . .
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// . . . | | . .
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// ----------------------------------------- --------------------------
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// . . . * . .
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// . . . * . .
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let (timer, (mut cr1, _cr2, _cr3, _cr4), mut out1) = dp
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.HRTIM_TIMA
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.pwm_advanced(pin_a, &mut rcc)
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.prescaler(prescaler)
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.period(0xFFFF)
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//.with_fault_source(fault_source1)
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//.with_fault_source(fault_source2)
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.with_fault_source(fault_source3) // Set fault source
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//.with_fault_source(fault_source4)
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//.with_fault_source(fault_source5)
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//.with_fault_source(fault_source6)
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.fault_action1(FaultAction::ForceInactive)
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.fault_action2(FaultAction::ForceInactive)
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// alternated every period with one being
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// inactive and the other getting to output its wave form
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// as normal
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.finalize(&mut fault_control);
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out1.enable_rst_event(EventSource::Cr1); // Set low on compare match with cr1
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out1.enable_set_event(EventSource::Period); // Set high at new period
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cr1.set_duty(timer.get_period() / 3);
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//unsafe {((HRTIM_COMMON::ptr() as *mut u8).offset(0x14) as *mut u32).write_volatile(1); }
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out1.enable();
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defmt::info!("Started");
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loop {
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for _ in 0..5 {
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delay.delay(500_u32.millis());
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defmt::info!("State: {}", out1.get_state());
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}
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if fault_control.fault_3.is_fault_active() {
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fault_control.fault_3.clear_fault(); // Clear fault every 5s
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out1.enable();
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defmt::info!("failt cleared, and output reenabled");
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}
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}
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}

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