@@ -154,14 +154,14 @@ macro_rules! hrtim_timer {
154154 /// * `HrTimerMode::Continuous`: Enabling the timer enables and starts it simultaneously.
155155 /// When the counter reaches the PER value, it rolls-over to 0x0000 and resumes counting.
156156 /// The counter can be reset at any time
157- pub fn enable_reset_event<E : super :: event:: TimerResetEventSource <$TIMX, PSCL >>( & mut self , _event: E ) {
157+ pub fn enable_reset_event<E : super :: event:: TimerResetEventSource <$TIMX, PSCL >>( & mut self , _event: & E ) {
158158 let tim = unsafe { & * $TIMX:: ptr( ) } ;
159159
160160 unsafe { tim. $rstXr. modify( |r, w| w. bits( r. bits( ) | E :: BITS ) ) ; }
161161 }
162162
163163 /// Stop listening to the specified event
164- pub fn disable_reset_event<E : super :: event:: TimerResetEventSource <$TIMX, PSCL >>( & mut self , _event: E ) {
164+ pub fn disable_reset_event<E : super :: event:: TimerResetEventSource <$TIMX, PSCL >>( & mut self , _event: & E ) {
165165 let tim = unsafe { & * $TIMX:: ptr( ) } ;
166166
167167 unsafe { tim. $rstXr. modify( |r, w| w. bits( r. bits( ) & !E :: BITS ) ) ; }
@@ -230,6 +230,12 @@ hrtim_timer_adc_trigger! {
230230 HRTIM_TIMF : [ ( Adc13 : [ ( PER : 1 << 24 ) , ( RST : 1 << 28 ) ] ) , ( Adc24 : [ ( PER : 1 << 24 ) , ] ) , ( Adc579 : [ ( PER : 30 ) , ( RST : 31 ) ] ) , ( Adc6810 : [ ( PER : 31 ) , ] ) ]
231231}
232232
233+ /// Master Timer Period event
233234impl < DST , PSCL > super :: event:: TimerResetEventSource < DST , PSCL > for HrTim < HRTIM_MASTER , PSCL > {
234235 const BITS : u32 = 1 << 4 ; // MSTPER
235236}
237+
238+ /// Master Timer Period event
239+ impl < DST , PSCL > super :: event:: EventSource < DST , PSCL > for HrTim < HRTIM_MASTER , PSCL > {
240+ const BITS : u32 = 1 << 7 ; // MSTPER
241+ }
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