HRTIM: Capture interrupts and clippy

Author: usbalbin

src/hrtim/capture.rs

@@ -9,6 +9,8 @@ pub struct HrCapt<TIM, PSCL, CH> {
     _x: PhantomData<(TIM, PSCL, CH)>,
 }
 
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[derive(Copy, Clone, Debug)]
 pub enum CountingDirection {
     Up = 0,
     Down = 1,
@@ -23,7 +25,7 @@ pub trait CaptureEvent<TIM, PSCL> {
     const BITS: u32;
 }
 
-trait HrCapture {
+pub trait HrCapture {
     fn get(&self) -> (u16, CountingDirection);
 
     /// Get number of ticks relative to beginning of upcounting
@@ -43,10 +45,14 @@ trait HrCapture {
         let dir_bit = dir as u32;
         dir_bit << 16 | u32::from(value)
     }
+
+    fn clear_interrupt(&mut self);
+
+    fn is_pending(&self) -> bool;
 }
 
 macro_rules! impl_capture {
-    ($($TIMX:ident: $CH:ident, $cptXYr:ident, $cptXYcr:ident, $cptXx:ident),+) => {
+    ($($TIMX:ident: $CH:ident, $cptXYr:ident, $cptXYcr:ident, $cptXx:ident, $dier:ident, $icr:ident, $isr:ident, $cptXie:ident, $cptXc:ident, $cptX:ident),+) => {
         $(impl<PSCL> HrCapt<$TIMX, PSCL, $CH> {
             /// Add event to capture
             ///
@@ -78,6 +84,15 @@ macro_rules! impl_capture {
 
                 tim.$cptXYcr.modify(|_, w| w.swcpt().set_bit());
             }
+
+            // TODO: It would be sufficient to instead of hr_control only require exclusive access to the owning timer
+            // however that would be hard to do since typically the capture device is a field of that same timer.
+            // Would it make more sense to have this method direcly on HrTim instead?
+            pub fn enable_interrupt(&mut self, enable: bool, _hr_control: &mut super::HrPwmControl) {
+                let tim = unsafe { &*$TIMX::ptr() };
+
+                tim.$dier.modify(|_r, w| w.$cptXie().bit(enable));
+            }
         }
 
         impl<PSCL> HrCapture for HrCapt<$TIMX, PSCL, $CH> {
@@ -92,26 +107,40 @@ macro_rules! impl_capture {
 
                 (value, dir)
             }
+
+            fn clear_interrupt(&mut self) {
+                let tim = unsafe { &*$TIMX::ptr() };
+
+                // No need for exclusive access since this is a write only register
+                tim.$icr.write(|w| w.$cptXc().set_bit());
+            }
+
+            fn is_pending(&self) -> bool {
+                let tim = unsafe { &*$TIMX::ptr() };
+
+                // No need for exclusive access since this is a read only register
+                tim.$isr.read().$cptX().bit()
+            }
         })+
     };
 }
 
 impl_capture! {
-    HRTIM_TIMA: Ch1, cpt1ar, cpt1acr, cpt1x,
-    HRTIM_TIMA: Ch2, cpt2ar, cpt2acr, cpt2x,
+    HRTIM_TIMA: Ch1, cpt1ar, cpt1acr, cpt1x, timadier, timaicr, timaisr, cpt1ie, cpt1c, cpt1,
+    HRTIM_TIMA: Ch2, cpt2ar, cpt2acr, cpt2x, timadier, timaicr, timaisr, cpt2ie, cpt2c, cpt2,
 
-    HRTIM_TIMB: Ch1, cpt1br, cpt1bcr, cpt1x,
-    HRTIM_TIMB: Ch2, cpt2br, cpt2bcr, cpt2x,
+    HRTIM_TIMB: Ch1, cpt1br, cpt1bcr, cpt1x, timbdier, timbicr, timbisr, cpt1ie, cpt1c, cpt1,
+    HRTIM_TIMB: Ch2, cpt2br, cpt2bcr, cpt2x, timbdier, timbicr, timbisr, cpt2ie, cpt2c, cpt2,
 
-    HRTIM_TIMC: Ch1, cpt1cr, cpt1ccr, cpt1x,
-    HRTIM_TIMC: Ch2, cpt2cr, cpt2ccr, cpt2x,
+    HRTIM_TIMC: Ch1, cpt1cr, cpt1ccr, cpt1x, timcdier, timcicr, timcisr, cpt1ie, cpt1c, cpt1,
+    HRTIM_TIMC: Ch2, cpt2cr, cpt2ccr, cpt2x, timcdier, timcicr, timcisr, cpt2ie, cpt2c, cpt2,
 
-    HRTIM_TIMD: Ch1, cpt1dr, cpt1dcr, cpt1x,
-    HRTIM_TIMD: Ch2, cpt2dr, cpt2dcr, cpt2x,
+    HRTIM_TIMD: Ch1, cpt1dr, cpt1dcr, cpt1x, timddier, timdicr, timdisr, cpt1ie, cpt1c, cpt1,
+    HRTIM_TIMD: Ch2, cpt2dr, cpt2dcr, cpt2x, timddier, timdicr, timdisr, cpt2ie, cpt2c, cpt2,
 
-    HRTIM_TIME: Ch1, cpt1er, cpt1ecr, cpt1x,
-    HRTIM_TIME: Ch2, cpt2er, cpt2ecr, cpt2x,
+    HRTIM_TIME: Ch1, cpt1er, cpt1ecr, cpt1x, timedier, timeicr, timeisr, cpt1ie, cpt1c, cpt1,
+    HRTIM_TIME: Ch2, cpt2er, cpt2ecr, cpt2x, timedier, timeicr, timeisr, cpt2ie, cpt2c, cpt2,
 
-    HRTIM_TIMF: Ch1, cpt1fr, cpt1fcr, cpt1x,
-    HRTIM_TIMF: Ch2, cpt2fr, cpt2fcr, cpt2x
+    HRTIM_TIMF: Ch1, cpt1fr, cpt1fcr, cpt1x, timfdier, timficr, timfisr, cpt1ie, cpt1c, cpt1,
+    HRTIM_TIMF: Ch2, cpt2fr, cpt2fcr, cpt2x, timfdier, timficr, timfisr, cpt2ie, cpt2c, cpt2
 }

src/hrtim/control.rs

@@ -247,14 +247,14 @@ macro_rules! impl_adc1234_trigger {
             }
         }
 
-        $(impl Into<crate::adc::config::ExternalTrigger12> for &$t {
-            fn into(self) -> crate::adc::config::ExternalTrigger12 {
+        $(impl From<&$t> for crate::adc::config::ExternalTrigger12 {
+            fn from(_val: &$t) -> Self {
                 crate::adc::config::ExternalTrigger12::$variant12
             }
         })*
 
-        impl Into<crate::adc::config::ExternalTrigger345> for &$t {
-            fn into(self) -> crate::adc::config::ExternalTrigger345 {
+        impl From<&$t> for crate::adc::config::ExternalTrigger345 {
+            fn from(_val: &$t) -> Self {
                 crate::adc::config::ExternalTrigger345::$variant345
             }
         }
@@ -276,14 +276,14 @@ macro_rules! impl_adc5678910_trigger {
             }
         }
 
-        impl Into<crate::adc::config::ExternalTrigger12> for &$t {
-            fn into(self) -> crate::adc::config::ExternalTrigger12 {
+        impl From<&$t> for crate::adc::config::ExternalTrigger12 {
+            fn from(_val: &$t) -> Self {
                 crate::adc::config::ExternalTrigger12::$variant12
             }
         }
 
-        impl Into<crate::adc::config::ExternalTrigger345> for &$t {
-            fn into(self) -> crate::adc::config::ExternalTrigger345 {
+        impl From<&$t> for crate::adc::config::ExternalTrigger345 {
+            fn from(_val: &$t) -> Self {
                 crate::adc::config::ExternalTrigger345::$variant345
             }
         }

src/hrtim/output.rs

@@ -1,5 +1,5 @@
 use crate::stm32::{
-    HRTIM_MASTER, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF,
+    HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF,
 };
 use core::marker::PhantomData;
 
@@ -179,7 +179,7 @@ pins! {
     HRTIM_TIMF: CH1: PC6<Alternate<AF13>>, CH2: PC7<Alternate<AF13>>
 }
 
-impl Pins<HRTIM_MASTER, (), ComplementaryImpossible> for () {
+impl<T> Pins<T, (), ComplementaryImpossible> for () {
     type Channel = ();
 }