Add TX and RX logic invert options to USART config

Author: Keybinder

src/serial/config.rs

@@ -61,6 +61,8 @@ pub struct LowPowerConfig {
     pub(crate) parity: Parity,
     pub(crate) stopbits: StopBits,
     pub(crate) swap: bool,
+    pub(crate) tx_invert: bool,
+    pub(crate) rx_invert: bool,
     pub(crate) fifo_enable: bool,
     pub(crate) tx_fifo_threshold: FifoThreshold,
     pub(crate) rx_fifo_threshold: FifoThreshold,
@@ -75,6 +77,8 @@ pub struct FullConfig {
     pub(crate) parity: Parity,
     pub(crate) stopbits: StopBits,
     pub(crate) swap: bool,
+    pub(crate) tx_invert: bool,
+    pub(crate) rx_invert: bool,
     pub(crate) fifo_enable: bool,
     pub(crate) tx_fifo_threshold: FifoThreshold,
     pub(crate) rx_fifo_threshold: FifoThreshold,
@@ -128,6 +132,24 @@ impl LowPowerConfig {
         self
     }
 
+    /// Invert the polarity of the Tx pin
+    ///
+    /// The peripheral will treat VDD as a "low" (mark) line value and Gnd as a "high" (idle)
+    /// value for the Tx pin.
+    pub fn tx_invert(mut self) -> Self {
+        self.tx_invert = true;
+        self
+    }
+
+    /// Invert the polarity of the Rx pin
+    ///
+    /// The peripheral will treat VDD as a "low" (mark) line value and Gnd as a "high" (idle)
+    /// value for the Rx pin.
+    pub fn rx_invert(mut self) -> Self {
+        self.rx_invert = true;
+        self
+    }
+
     pub fn fifo_enable(mut self) -> Self {
         self.fifo_enable = true;
         self
@@ -198,6 +220,24 @@ impl FullConfig {
         self
     }
 
+    /// Invert the polarity of the Tx pin
+    ///
+    /// The peripheral will treat VDD as a "low" (mark) line value and Gnd as a "high" (idle)
+    /// value for the Tx pin.
+    pub fn tx_invert(mut self) -> Self {
+        self.tx_invert = true;
+        self
+    }
+
+    /// Invert the polarity of the Rx pin
+    ///
+    /// The peripheral will treat VDD as a "low" (mark) line value and Gnd as a "high" (idle)
+    /// value for the Rx pin.
+    pub fn rx_invert(mut self) -> Self {
+        self.rx_invert = true;
+        self
+    }
+
     pub fn fifo_enable(mut self) -> Self {
         self.fifo_enable = true;
         self
@@ -243,6 +283,8 @@ impl Default for LowPowerConfig {
             parity: Parity::ParityNone,
             stopbits: StopBits::STOP1,
             swap: false,
+            tx_invert: false,
+            rx_invert: false,
             fifo_enable: false,
             tx_fifo_threshold: FifoThreshold::FIFO_8_BYTES,
             rx_fifo_threshold: FifoThreshold::FIFO_8_BYTES,
@@ -261,6 +303,8 @@ impl Default for FullConfig {
             parity: Parity::ParityNone,
             stopbits: StopBits::STOP1,
             swap: false,
+            tx_invert: false,
+            rx_invert: false,
             fifo_enable: false,
             tx_fifo_threshold: FifoThreshold::FIFO_8_BYTES,
             rx_fifo_threshold: FifoThreshold::FIFO_8_BYTES,

src/serial/usart.rs

@@ -581,6 +581,10 @@ macro_rules! uart_lp {
                         .bits(config.stopbits.bits())
                         .swap()
                         .bit(config.swap)
+                        .txinv()
+                        .bit(config.tx_invert)
+                        .rxinv()
+                        .bit(config.rx_invert)
                 });
 
                 usart.cr3().write(|w| unsafe {
@@ -726,6 +730,10 @@ macro_rules! uart_full {
                         .bits(config.stopbits.bits())
                         .swap()
                         .bit(config.swap)
+                        .txinv()
+                        .bit(config.tx_invert)
+                        .rxinv()
+                        .bit(config.rx_invert)
                 });
 
                 if let Some(timeout) = config.receiver_timeout {