Add hrtim support

Author: usbalbin

.github/workflows/ci.yml

@@ -19,7 +19,7 @@ jobs:
           - stm32g431
           - stm32g441
           - stm32g473
-          - stm32g474
+          - stm32g474,hrtim
           - stm32g483
           - stm32g484
           - stm32g491 # Does not seem ready yet

.vscode/settings.json

@@ -8,6 +8,7 @@
   "rust-analyzer.cargo.features": [
     "stm32g484",
     "defmt",
-    "cordic"
+    "cordic",
+    "hrtim"
   ]
 }

Cargo.toml

@@ -19,6 +19,7 @@ fugit = "0.3.7"
 stm32-usbd = { version = "0.7.0", optional = true }
 fixed = { version = "1.28.0", optional = true }
 embedded-io = "0.6"
+stm32-hrtim = { version = "0.1.0", optional = true }
 
 [dependencies.cortex-m]
 version = "0.7.7"
@@ -81,9 +82,9 @@ usb = ["dep:stm32-usbd"]
 stm32g431 = ["stm32g4/stm32g431", "cat2"]
 stm32g441 = ["stm32g4/stm32g441", "cat2"]
 stm32g473 = ["stm32g4/stm32g473", "cat3", "adc3", "adc4", "adc5"]
-stm32g474 = ["stm32g4/stm32g474", "cat3", "adc3", "adc4", "adc5"]
+stm32g474 = ["stm32g4/stm32g474", "cat3", "adc3", "adc4", "adc5", "stm32-hrtim/stm32g474"]
 stm32g483 = ["stm32g4/stm32g483", "cat3", "adc3", "adc4", "adc5"]
-stm32g484 = ["stm32g4/stm32g484", "cat3", "adc3", "adc4", "adc5"]
+stm32g484 = ["stm32g4/stm32g484", "cat3", "adc3", "adc4", "adc5", "stm32-hrtim/stm32g484"]
 stm32g491 = ["stm32g4/stm32g491", "cat4", "adc3"]
 stm32g4a1 = ["stm32g4/stm32g4a1", "cat4", "adc3"]
 
@@ -105,6 +106,7 @@ defmt = [
     "embedded-hal/defmt-03",
     "embedded-io/defmt-03",
     "embedded-test/defmt",
+    "stm32-hrtim?/defmt"
 ]
 cordic = ["dep:fixed"]
 adc3 = []
@@ -117,6 +119,7 @@ cat3 = ["gpio-g47x"]
 cat4 = ["gpio-g49x"]
 
 can = ["dep:fdcan"]
+hrtim = ["dep:stm32-hrtim"] # Only available for stm32g474 and stm32g484
 
 [profile.dev]
 codegen-units = 1

src/hrtim/adc_trigger.rs

@@ -0,0 +1,53 @@
+use crate::adc;
+use stm32_hrtim::adc_trigger::{
+    AdcTrigger1, AdcTrigger10, AdcTrigger2, AdcTrigger3, AdcTrigger4, AdcTrigger5, AdcTrigger6,
+    AdcTrigger7, AdcTrigger8, AdcTrigger9,
+};
+
+macro_rules! impl_adc1234_trigger {
+    ($($t:ident: [$variant345:ident $(, $variant12:ident)*]),*) => {$(
+        $(impl From<&$t> for adc::config::ExternalTrigger12 {
+            fn from(_val: &$t) -> Self {
+                adc::config::ExternalTrigger12::$variant12
+            }
+        })*
+
+        impl From<&$t> for adc::config::ExternalTrigger345 {
+            fn from(_val: &$t) -> Self {
+                adc::config::ExternalTrigger345::$variant345
+            }
+        }
+    )*}
+}
+
+macro_rules! impl_adc5678910_trigger {
+    ($($t:ident: [$variant:ident]),*) => {$(
+        impl From<&$t> for adc::config::ExternalTrigger12 {
+            fn from(_val: &$t) -> Self {
+                adc::config::ExternalTrigger12::$variant
+            }
+        }
+
+        impl From<&$t> for adc::config::ExternalTrigger345 {
+            fn from(_val: &$t) -> Self {
+                adc::config::ExternalTrigger345::$variant
+            }
+        }
+    )*}
+}
+
+impl_adc1234_trigger! {//adc345,          adc12
+    AdcTrigger1: [Hrtim_adc_trg_1, Hrtim_adc_trg_1],
+    AdcTrigger2: [Hrtim_adc_trg_2],
+    AdcTrigger3: [Hrtim_adc_trg_3, Hrtim_adc_trg_3],
+    AdcTrigger4: [Hrtim_adc_trg_4]
+}
+
+impl_adc5678910_trigger! {
+    AdcTrigger5: [Hrtim_adc_trg_5],
+    AdcTrigger6: [Hrtim_adc_trg_6],
+    AdcTrigger7: [Hrtim_adc_trg_7],
+    AdcTrigger8: [Hrtim_adc_trg_8],
+    AdcTrigger9: [Hrtim_adc_trg_9],
+    AdcTrigger10: [Hrtim_adc_trg_10]
+}

src/hrtim/capture.rs

@@ -0,0 +1,32 @@
+use stm32_hrtim::{
+    capture::{Ch1, Ch2, Dma, HrCapt},
+    pac::{HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF},
+};
+
+use crate::dma::{mux::DmaMuxResources, traits::TargetAddress, PeripheralToMemory};
+
+macro_rules! impl_dma_traits {
+    ($TIMX:ident, $CH:ident, $cptXr:ident) => {
+        unsafe impl<PSCL> TargetAddress<PeripheralToMemory> for HrCapt<$TIMX, PSCL, $CH, Dma> {
+            #[inline(always)]
+            fn address(&self) -> u32 {
+                let tim = unsafe { &*$TIMX::ptr() };
+                &tim.$cptXr() as *const _ as u32
+            }
+
+            type MemSize = u32;
+
+            const REQUEST_LINE: Option<u8> = Some(DmaMuxResources::$TIMX as u8);
+        }
+    };
+    ($($TIMX:ident),+) => {
+        $(
+            impl_dma_traits!($TIMX, Ch1, cpt1r);
+            impl_dma_traits!($TIMX, Ch2, cpt2r);
+        )+
+    }
+}
+
+impl_dma_traits! {
+    HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF
+}

src/hrtim/external_event.rs

@@ -0,0 +1,60 @@
+use stm32_hrtim::external_event::{EevInput, EevSrcBits, SourceBuilder};
+
+use crate::gpio::{
+    self,
+    gpiob::{PB3, PB4, PB5, PB6, PB7, PB8, PB9},
+    gpioc::{PC11, PC12, PC5, PC6},
+};
+
+pub trait EevInputExt<const N: u8> {
+    fn bind<const IS_FAST: bool, SRC>(self, src: SRC) -> SourceBuilder<N, IS_FAST>
+    where
+        SRC: EevSrcBits<N>;
+}
+
+macro_rules! impl_eev_input {
+    ($($N:literal: COMP=[$compX:ident $(, ($compY:ident, $compY_src_bits:literal))*], PINS=[$(($pin:ident, $af:literal)),*])*) => {$(
+        $(unsafe impl EevSrcBits<$N> for $pin<gpio::Input>{
+            const SRC_BITS: u8 = 0b00;
+            fn cfg(self) {
+                self.into_alternate::<$af>();
+            }
+        })*
+
+        unsafe impl<ED> EevSrcBits<$N> for &crate::comparator::Comparator<crate::comparator::$compX, ED>
+            where ED: crate::comparator::EnabledState
+        {
+            const SRC_BITS: u8 = 0b01;
+        }
+
+        $(
+            unsafe impl<ED> EevSrcBits<$N> for &crate::comparator::Comparator<crate::comparator::$compY, ED>
+                where ED: crate::comparator::EnabledState
+            {
+                const SRC_BITS: u8 = $compY_src_bits;
+            }
+        )*
+
+        impl EevInputExt<$N> for EevInput<$N> {
+            fn bind<const IS_FAST: bool, SRC>(self, src: SRC) -> SourceBuilder<$N, IS_FAST>
+                where SRC: EevSrcBits<$N>
+            {
+                src.cfg();
+                unsafe { SourceBuilder::new(SRC::SRC_BITS) }
+            }
+        }
+    )*};
+}
+
+impl_eev_input! {
+    1: COMP = [COMP2], PINS = [(PC12, 3)]
+    2: COMP = [COMP4], PINS = [(PC11, 3)]
+    3: COMP = [COMP6], PINS = [(PB7, 13)]
+    4: COMP = [COMP1, (COMP5, 0b10)], PINS = [(PB6, 13)]
+    5: COMP = [COMP3, (COMP7, 0b10)], PINS = [(PB9, 13)]
+    6: COMP = [COMP2, (COMP1, 0b10)], PINS = [(PB5, 13)]
+    7: COMP = [COMP4], PINS = [(PB4, 13)]
+    8: COMP = [COMP6, (COMP3, 0b10)], PINS = [(PB8, 13)]
+    9: COMP = [COMP5, (COMP4, 0b11)], PINS = [(PB3, 13)]
+    10: COMP = [COMP7], PINS = [(PC5, 13), (PC6, 3)]
+}

src/hrtim/fault.rs

@@ -0,0 +1,60 @@
+use stm32_hrtim::fault::{self, SourceBuilder};
+
+use crate::{
+    comparator::{COMP1, COMP2, COMP3, COMP4, COMP5, COMP6},
+    gpio::{
+        self,
+        gpioa::{PA12, PA15},
+        gpiob::{PB0, PB10, PB11},
+        gpioc::{PC10, PC7},
+    },
+};
+
+// TODO: Come up with a better names
+
+pub trait FaultInput<S> {
+    fn bind(self, src: S) -> SourceBuilder<Self>
+    where
+        Self: Sized;
+}
+
+macro_rules! impl_faults {
+    ($(
+        $input:ident:
+            PINS=[($pin:ident, $af:literal) $(,($pin_b:ident, $af_b:literal))*],
+            COMP=$compX:ident,
+    )+) => {$(
+        impl FaultInput<$pin<gpio::Alternate<$af>>> for fault::$input {
+            fn bind(self, _pin: $pin<gpio::Alternate<$af>>) -> SourceBuilder<fault::$input> {
+                unsafe { SourceBuilder::new(self, 0b00) }
+            }
+        }
+
+        $(
+            impl FaultInput<$pin_b<gpio::Alternate<$af_b>>> for fault::$input {
+                fn bind(self, _pin: $pin_b<gpio::Alternate<$af_b>>) -> SourceBuilder<fault::$input> {
+                    unsafe { SourceBuilder::new(self, 0b00) }
+                }
+            }
+        )*
+
+        impl FaultInput<crate::comparator::Comparator<$compX, crate::comparator::Enabled>> for fault::$input {
+            fn bind(self, _comp: crate::comparator::Comparator<$compX, crate::comparator::Enabled>) -> SourceBuilder<fault::$input> {
+                unsafe { SourceBuilder::new(self, 0b01) }
+            }
+        }
+
+        /*pub fn bind_external(?) {
+            SourceBuilder::new(self, 0b10);
+        }*/
+    )+}
+}
+
+impl_faults!(
+    FaultInput1: PINS=[(PA12, 13)], COMP=COMP2,
+    FaultInput2: PINS=[(PA15, 13)], COMP=COMP4,
+    FaultInput3: PINS=[(PB10, 13)], COMP=COMP6,
+    FaultInput4: PINS=[(PB11, 13)], COMP=COMP1,
+    FaultInput5: PINS=[(PB0, 13), (PC7, 3)], COMP=COMP3,
+    FaultInput6: PINS=[(PC10, 13)], COMP=COMP5,
+);

src/hrtim/mod.rs

@@ -0,0 +1,123 @@
+pub mod adc_trigger;
+pub mod capture;
+pub mod external_event;
+pub mod fault;
+
+use core::mem::MaybeUninit;
+
+use crate::{
+    gpio,
+    rcc::{Enable, Reset},
+    stm32::{HRTIM_COMMON, HRTIM_TIMA, HRTIM_TIMB, HRTIM_TIMC, HRTIM_TIMD, HRTIM_TIME, HRTIM_TIMF},
+};
+use stm32_hrtim::{
+    control::{HrPwmControl, HrTimOngoingCalibration},
+    output::{HrOut1, HrOut2, ToHrOut},
+    HrParts, HrPwmBuilder,
+};
+
+pub use stm32_hrtim;
+
+pub trait HrControltExt {
+    fn hr_control(self, rcc: &mut crate::rcc::Rcc) -> HrTimOngoingCalibration;
+}
+
+impl HrControltExt for crate::stm32::HRTIM_COMMON {
+    fn hr_control(self, rcc: &mut crate::rcc::Rcc) -> HrTimOngoingCalibration {
+        HRTIM_COMMON::enable(rcc);
+        HRTIM_COMMON::reset(rcc);
+
+        // TODO: Verify that the HRTIM gets a clock of 100-170MHz as input
+        // SAFETY: We have enabled the rcc
+        unsafe { HrTimOngoingCalibration::hr_control() }
+    }
+}
+
+pub trait HrPwmBuilderExt<TIM, PSCL, PINS: ToHrOut<TIM>> {
+    fn finalize(self, control: &mut HrPwmControl) -> HrParts<TIM, PSCL, PINS::Out<PSCL>>;
+}
+macro_rules! impl_finalize {
+    ($($TIMX:ident),+) => {$(
+        impl<PSCL: stm32_hrtim::HrtimPrescaler, PINS: HrtimPin<$TIMX>> HrPwmBuilderExt<$TIMX, PSCL, PINS>
+            for HrPwmBuilder<$TIMX, PSCL, stm32_hrtim::PreloadSource, PINS>
+        {
+            fn finalize(
+                self,
+                control: &mut HrPwmControl,
+            ) -> HrParts<$TIMX, PSCL, <PINS as ToHrOut<$TIMX>>::Out<PSCL>> {
+                let pins = self._init(control);
+                pins.connect_to_hrtim();
+                unsafe { MaybeUninit::uninit().assume_init() }
+            }
+        }
+    )+};
+}
+
+impl_finalize! {
+    HRTIM_TIMA,
+    HRTIM_TIMB,
+    HRTIM_TIMC,
+    HRTIM_TIMD,
+    HRTIM_TIME,
+    HRTIM_TIMF
+}
+
+use gpio::{
+    gpioa::{PA10, PA11, PA8, PA9},
+    gpioc::PC8,
+};
+
+use gpio::{
+    gpiob::{PB12, PB13, PB14, PB15},
+    gpioc::PC9,
+};
+
+use gpio::gpioc::{PC6, PC7};
+
+pub trait HrtimPin<TIM>: ToHrOut<TIM> {
+    fn connect_to_hrtim(self);
+}
+
+impl<TIM, PA, PB> HrtimPin<TIM> for (PA, PB)
+where
+    PA: HrtimPin<TIM>,
+    PB: HrtimPin<TIM>,
+{
+    fn connect_to_hrtim(self) {
+        self.0.connect_to_hrtim();
+        self.1.connect_to_hrtim();
+    }
+}
+
+macro_rules! pins_helper {
+    ($TIMX:ty, $HrOutY:ident, $CHY:ident<$CHY_AF:literal>) => {
+        //impl sealed::Sealed<$TIMX> for $CHY<GpioInputMode> {}
+
+        unsafe impl ToHrOut<$TIMX> for $CHY<gpio::DefaultMode> {
+            type Out<PSCL> = $HrOutY<$TIMX, PSCL>;
+        }
+
+        impl HrtimPin<$TIMX> for $CHY<gpio::DefaultMode> {
+            // Pin<Gpio, Index, Alternate<PushPull, AF>>
+            fn connect_to_hrtim(self) {
+                let _: $CHY<gpio::Alternate<{ $CHY_AF }>> = self.into_alternate();
+            }
+        }
+    };
+}
+
+macro_rules! pins {
+    ($($TIMX:ty: CH1: $CH1:ident<$CH1_AF:literal>, CH2: $CH2:ident<$CH2_AF:literal>),+) => {$(
+        pins_helper!($TIMX, HrOut1, $CH1<$CH1_AF>);
+        pins_helper!($TIMX, HrOut2, $CH2<$CH2_AF>);
+    )+};
+}
+
+pins! {
+    HRTIM_TIMA: CH1: PA8<13>,  CH2: PA9<13>,
+    HRTIM_TIMB: CH1: PA10<13>, CH2: PA11<13>,
+    HRTIM_TIMC: CH1: PB12<13>, CH2: PB13<13>,
+    HRTIM_TIMD: CH1: PB14<13>, CH2: PB15<13>,
+    HRTIM_TIME: CH1: PC8<3>,   CH2: PC9<3>,
+    HRTIM_TIMF: CH1: PC6<13>,  CH2: PC7<13>
+}