diff --git a/examples/flash_with_rtic.rs b/examples/flash_with_rtic.rs index 9db939d1..8277d08c 100644 --- a/examples/flash_with_rtic.rs +++ b/examples/flash_with_rtic.rs @@ -88,6 +88,14 @@ mod app { 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0 as u8, ]; + let data = [ + &one_byte[..], + &two_bytes[..], + &three_bytes[..], + &four_bytes[..], + &eight_bytes[..], + &sixteen_bytes[..], + ]; let mut flash = dp.FLASH.constrain(); let mut flash_writer = flash.writer::<2048>(FlashSize::Sz256K); @@ -102,197 +110,40 @@ mod app { .erase(FLASH_EXAMPLE_START_ADDRESS, 128) .unwrap(); // Erase entire page - for i in 0..6 { - match i { - 0 => { - // This test should fail, as the data needs to be divisible by 8 and force padding is false - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &one_byte, - false, - ); - assert!(result.is_err()); - assert_eq!( - result.err().unwrap(), - stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8 - ); - - // This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &one_byte, - true, - ); - assert!(result.is_ok()); - logger::info!( - "Wrote 1 byte to address {}", - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING - ); - } - 1 => { - // This test should fail, as the data needs to be divisible by 8 and force padding is false - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &two_bytes, - false, - ); - assert!(result.is_err()); - assert_eq!( - result.err().unwrap(), - stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8 - ); - - // This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &two_bytes, - true, - ); - assert!(result.is_ok()); - logger::info!( - "Wrote 2 bytes to address {}", - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING - ); - } - 2 => { - // This test should fail, as the data needs to be divisible by 8 and force padding is false - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &three_bytes, - false, - ); - assert!(result.is_err()); - assert_eq!( - result.err().unwrap(), - stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8 - ); - - // This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &three_bytes, - true, - ); - assert!(result.is_ok()); - logger::info!( - "Wrote 3 bytes to address {}", - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING - ); - } - 3 => { - // This test should fail, as the data needs to be divisible by 8 and force padding is false - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &four_bytes, - false, - ); - assert!(result.is_err()); - assert_eq!( - result.err().unwrap(), - stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8 - ); - - // This test should pass, as the data needs to be divisible by 8 and force padding is true, so the one_byte array will be padded with 7 bytes of 0xFF - let result = flash_writer.write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &four_bytes, - true, - ); - assert!(result.is_ok()); - logger::info!( - "Wrote 4 bytes to address {}", - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING - ); - } - 4 => { - flash_writer - .write( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - &eight_bytes, - false, - ) - .unwrap(); - logger::info!( - "Wrote 8 bytes to address {}", - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING - ); - } - 5 => { - flash_writer - .write(FLASH_EXAMPLE_START_ADDRESS + i * 16, &sixteen_bytes, false) - .unwrap(); - logger::info!( - "Wrote 16 bytes to address {}", - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING - ); - } - _ => (), - } + for (i, data) in data.iter().enumerate() { + let i = i as u32; + // This test should fail, as the data needs to be divisible by 8 and force padding is false + let result = + flash_writer.write(FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, data, false); + assert!(data.len() % 8 == 0 || result.is_err()); + assert_eq!( + result.err().unwrap(), + stm32g4xx_hal::flash::Error::ArrayMustBeDivisibleBy8 + ); + + // This test should pass, as the data needs to be divisible by 8 and force padding is true. + // For example, the one_byte array will be padded with 7 bytes of 0xFF + let result = + flash_writer.write(FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, data, true); + assert!(result.is_ok()); + logger::info!( + "Wrote {} byte to address {}", + data.len(), + FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING + ); } - logger::info!("Validating data written data by performing read and compare"); - - for i in 0..6 { - match i { - 0 => { - let bytes = flash_writer - .read(FLASH_EXAMPLE_START_ADDRESS as u32, one_byte.len()) - .unwrap(); - assert!(compare_arrays(&bytes, &one_byte)); - logger::info!("Validated 1 byte data"); - } - 1 => { - let bytes = flash_writer - .read( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - two_bytes.len(), - ) - .unwrap(); - assert!(compare_arrays(&bytes, &two_bytes)); - logger::info!("Validated 2 byte data"); - } - 2 => { - let bytes = flash_writer - .read( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - three_bytes.len(), - ) - .unwrap(); - assert!(compare_arrays(&bytes, &three_bytes)); - logger::info!("Validated 3 byte data"); - } - 3 => { - let bytes = flash_writer - .read( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - four_bytes.len(), - ) - .unwrap(); - assert!(compare_arrays(&bytes, &four_bytes)); - logger::info!("Validated 4 byte data"); - } - 4 => { - let bytes = flash_writer - .read( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - eight_bytes.len(), - ) - .unwrap(); - assert!(compare_arrays(&bytes, &eight_bytes)); - logger::info!("Validated 8 byte data"); - } - 5 => { - let bytes = flash_writer - .read( - FLASH_EXAMPLE_START_ADDRESS + i * FLASH_SPACING, - sixteen_bytes.len(), - ) - .unwrap(); - assert!(compare_arrays(&bytes, &sixteen_bytes)); - logger::info!("Validated 5 byte data"); - } - _ => (), - } + logger::info!("Validating data written by performing read and compare"); + + for (i, data) in data.iter().enumerate() { + let bytes = flash_writer + .read( + FLASH_EXAMPLE_START_ADDRESS + i as u32 * FLASH_SPACING, + data.len(), + ) + .unwrap(); + assert_eq!(&bytes, data); + logger::info!("Validated {} byte data", data.len()); } logger::info!( diff --git a/src/can.rs b/src/can.rs index 15d171a2..398916a4 100644 --- a/src/can.rs +++ b/src/can.rs @@ -11,19 +11,6 @@ mod sealed { pub trait Rx {} } -/// Select an FDCAN Clock Source -#[allow(clippy::upper_case_acronyms)] -#[allow(dead_code)] -enum FdCanClockSource { - /// Select HSE as the FDCAN clock source - HSE = 0b00, - /// Select PLL "Q" clock as the FDCAN clock source - PLLQ = 0b01, - /// Select "P" clock as the FDCAN clock source - PCLK = 0b10, - //Reserved = 0b10, -} - /// Storage type for the CAN controller #[derive(Debug)] pub struct Can { @@ -55,18 +42,6 @@ where { Self::enable(&rcc.rb); - if rcc.rb.ccipr().read().fdcansel().is_hse() { - // Select P clock as FDCAN clock source - rcc.rb.ccipr().modify(|_, w| { - // This is sound, as `FdCanClockSource` only contains valid values for this field. - unsafe { - w.fdcansel().bits(FdCanClockSource::PCLK as u8); - } - - w - }); - } - self.fdcan_unchecked() } diff --git a/src/cordic.rs b/src/cordic.rs index db35701b..104420ee 100644 --- a/src/cordic.rs +++ b/src/cordic.rs @@ -713,7 +713,7 @@ pub mod op { func: &'a Op::Func, } - impl<'a, Arg, Res, Op> Operation<'a, Arg, Res, Op> + impl Operation<'_, Arg, Res, Op> where Arg: types::arg::State, Res: types::res::State, @@ -914,10 +914,12 @@ pub mod op { pub struct Any; impl Feature for Any { - type NArgs = () + type NArgs + = () where Arg: types::arg::State + types::sealed::Tag; - type NRes = () + type NRes + = () where Res: types::res::State + types::sealed::Tag; type Scale = (); diff --git a/src/flash.rs b/src/flash.rs index 9edf1bfa..2505f193 100644 --- a/src/flash.rs +++ b/src/flash.rs @@ -58,7 +58,7 @@ pub struct FlashWriter<'a, const SECTOR_SZ_KB: u32> { flash_sz: FlashSize, verify: bool, } -impl<'a, const SECTOR_SZ_KB: u32> FlashWriter<'a, SECTOR_SZ_KB> { +impl FlashWriter<'_, SECTOR_SZ_KB> { #[allow(unused)] fn unlock_options(&mut self) -> Result<()> { // Check if flash is busy diff --git a/src/rcc/config.rs b/src/rcc/config.rs index a2ab3443..6998eafa 100644 --- a/src/rcc/config.rs +++ b/src/rcc/config.rs @@ -325,6 +325,18 @@ impl Default for PllConfig { } } +/// FDCAN Clock Source +#[allow(clippy::upper_case_acronyms)] +pub enum FdCanClockSource { + /// Select HSE as the FDCAN clock source + HSE = 0b00, + /// Select PLL "Q" clock as the FDCAN clock source + PLLQ = 0b01, + /// Select "P" clock as the FDCAN clock source + PCLK = 0b10, + //Reserved = 0b10, +} + /// Clocks configutation pub struct Config { pub(crate) sys_mux: SysClockSrc, @@ -335,6 +347,8 @@ pub struct Config { /// Required for f_sys > 150MHz pub(crate) enable_boost: bool, + + pub(crate) fdcansel: FdCanClockSource, } impl Config { @@ -379,6 +393,11 @@ impl Config { self.enable_boost = enable_boost; self } + + pub fn fdcan_src(mut self, mux: FdCanClockSource) -> Self { + self.fdcansel = mux; + self + } } impl Default for Config { @@ -390,6 +409,7 @@ impl Default for Config { apb1_psc: Prescaler::NotDivided, apb2_psc: Prescaler::NotDivided, enable_boost: false, + fdcansel: FdCanClockSource::HSE, } } } diff --git a/src/rcc/mod.rs b/src/rcc/mod.rs index 0503f574..9030093e 100644 --- a/src/rcc/mod.rs +++ b/src/rcc/mod.rs @@ -216,6 +216,12 @@ impl Rcc { _ => apb2_freq * 2, }; + // Configure FDCAN clock source. + self.rb.ccipr().modify(|_, w| unsafe { + // This is sound, as `FdCanClockSource` only contains valid values for this field. + w.fdcansel().bits(rcc_cfg.fdcansel as u8) + }); + Rcc { rb: self.rb, clocks: Clocks { @@ -408,7 +414,7 @@ impl Rcc { let us_per_s = 1_000_000; // Number of cycles @ sys_freq for 1us, rounded up, this will // likely end up being 2us since the AHB prescaler is changed - let delay_cycles = (sys_freq + us_per_s - 1) / us_per_s; + let delay_cycles = sys_freq.div_ceil(us_per_s); cortex_m::asm::delay(delay_cycles); self.rb