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| 1 | +#![deny(warnings)] |
| 2 | +#![no_main] |
| 3 | +#![no_std] |
| 4 | + |
| 5 | +use cortex_m_rt::entry; |
| 6 | +mod utilities; |
| 7 | +use stm32h5xx_hal::{pac, prelude::*, spi}; |
| 8 | + |
| 9 | +use log::info; |
| 10 | + |
| 11 | +#[entry] |
| 12 | +fn main() -> ! { |
| 13 | + utilities::logger::init(); |
| 14 | + let dp = pac::Peripherals::take().unwrap(); |
| 15 | + |
| 16 | + // Constrain and Freeze power |
| 17 | + info!("Setup PWR... "); |
| 18 | + let pwr = dp.PWR.constrain(); |
| 19 | + let pwrcfg = pwr.freeze(); |
| 20 | + |
| 21 | + // Constrain and Freeze clock |
| 22 | + info!("Setup RCC... "); |
| 23 | + let rcc = dp.RCC.constrain(); |
| 24 | + let ccdr = rcc |
| 25 | + .sys_ck(100.MHz()) |
| 26 | + .pll1_q_ck(50.MHz()) |
| 27 | + .freeze(pwrcfg, &dp.SBS); |
| 28 | + |
| 29 | + // Acquire the GPIOB peripheral. This also enables the clock for |
| 30 | + // GPIOB in the RCC register. |
| 31 | + let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB); |
| 32 | + |
| 33 | + let sck = gpiob.pb13.into_alternate(); |
| 34 | + let miso = gpiob.pb14.into_alternate(); |
| 35 | + let mosi = gpiob.pb15.into_alternate(); |
| 36 | + let hcs = gpiob.pb4.into_alternate(); |
| 37 | + |
| 38 | + info!(""); |
| 39 | + info!("stm32h5xx-hal example - SPI"); |
| 40 | + info!(""); |
| 41 | + |
| 42 | + // Initialise the SPI peripheral. |
| 43 | + let mut spi = dp.SPI2.spi_slave( |
| 44 | + (sck, miso, mosi, hcs), |
| 45 | + spi::Config::new(spi::MODE_0) |
| 46 | + // Specify that we use the hardware cs |
| 47 | + .hardware_cs(spi::HardwareCSMode::SlaveSelectInput), |
| 48 | + ccdr.peripheral.SPI2, |
| 49 | + ); |
| 50 | + |
| 51 | + // This will write the contents of the buffer as long as a clock is provided |
| 52 | + spi.write(&[0u8, 1, 2, 3, 4, 5, 6]).unwrap(); |
| 53 | + |
| 54 | + // This will read into the buffer as long as a clock is provided |
| 55 | + let read = &mut [0u8; 4]; |
| 56 | + spi.read(read).unwrap(); |
| 57 | + |
| 58 | + // This will read and write while a clock is provided |
| 59 | + let read = &mut [0u8; 3]; |
| 60 | + spi.transfer(read, &[0x11, 0x22, 0x33]).unwrap(); |
| 61 | + |
| 62 | + loop { |
| 63 | + cortex_m::asm::nop(); |
| 64 | + } |
| 65 | +} |
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