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spi: Add slave mode operation (#62)
This adds slave operation to the SPI driver. The driver exposes the same set of APIs as those provided for master operation, with the exception that the blocking APIs are defined by the driver instead of the embedded-hal traits, which do not currently support slave operation. This closes #36.
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README.md

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@@ -36,10 +36,10 @@ of support for peripherals is shown in the table below.
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|------------|----|---|---|
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| GPIO || - | |
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| ICache || - | |
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| I2C || - | |
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|| I2C || - | |
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| SPI || - | SPI peripheral only (not implemented for USART peripheral) |
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| CAN | 🚧 | - | |
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| Rng | 🚧 | [#34](https://github.com/stm32-rs/stm32h5xx-hal/issues/34)| |
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| SPI | 🚧 | [#36](https://github.com/stm32-rs/stm32h5xx-hal/issues/36) | |
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| UART | 🚧 | - | |
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| DMA | 🚧 | - | |
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| ADC || [#35](https://github.com/stm32-rs/stm32h5xx-hal/issues/35) | |

examples/spi_slave.rs

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#![deny(warnings)]
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#![no_main]
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#![no_std]
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use cortex_m_rt::entry;
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mod utilities;
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use stm32h5xx_hal::{pac, prelude::*, spi};
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use log::info;
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#[entry]
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fn main() -> ! {
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utilities::logger::init();
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let dp = pac::Peripherals::take().unwrap();
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// Constrain and Freeze power
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info!("Setup PWR... ");
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let pwr = dp.PWR.constrain();
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let pwrcfg = pwr.freeze();
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// Constrain and Freeze clock
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info!("Setup RCC... ");
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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.sys_ck(100.MHz())
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.pll1_q_ck(50.MHz())
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.freeze(pwrcfg, &dp.SBS);
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// Acquire the GPIOB peripheral. This also enables the clock for
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// GPIOB in the RCC register.
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let sck = gpiob.pb13.into_alternate();
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let miso = gpiob.pb14.into_alternate();
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let mosi = gpiob.pb15.into_alternate();
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let hcs = gpiob.pb4.into_alternate();
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info!("");
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info!("stm32h5xx-hal example - SPI");
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info!("");
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// Initialise the SPI peripheral.
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let mut spi = dp.SPI2.spi_slave(
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(sck, miso, mosi, hcs),
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spi::Config::new(spi::MODE_0)
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// Specify that we use the hardware cs
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.hardware_cs(spi::HardwareCSMode::SlaveSelectInput),
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ccdr.peripheral.SPI2,
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);
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// This will write the contents of the buffer as long as a clock is provided
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spi.write(&[0u8, 1, 2, 3, 4, 5, 6]).unwrap();
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// This will read into the buffer as long as a clock is provided
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let read = &mut [0u8; 4];
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spi.read(read).unwrap();
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// This will read and write while a clock is provided
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let read = &mut [0u8; 3];
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spi.transfer(read, &[0x11, 0x22, 0x33]).unwrap();
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loop {
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cortex_m::asm::nop();
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}
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}

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