@@ -15,13 +15,13 @@ use cortex_m_semihosting::debug;
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use stm32h5xx_hal:: {
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pac,
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prelude:: * ,
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- spi:: { self , dma :: DuplexDmaTransfer , Config as SpiConfig } ,
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+ spi:: { self , Config as SpiConfig } ,
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} ;
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static mut SOURCE_BYTES : MaybeUninit < [ u8 ; 40 ] > = MaybeUninit :: uninit ( ) ;
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static mut DEST_BYTES : MaybeUninit < [ u8 ; 40 ] > = MaybeUninit :: zeroed ( ) ;
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- fn u8_to_u8_sequential ( ) -> ( & ' static [ u8 ; 40 ] , & ' static mut [ u8 ; 40 ] ) {
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+ fn u8_buf_pair ( ) -> ( & ' static [ u8 ; 40 ] , & ' static mut [ u8 ; 40 ] ) {
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let buf: & mut [ MaybeUninit < u8 > ; 40 ] = unsafe {
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& mut * ( core:: ptr:: addr_of_mut!( SOURCE_BYTES )
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as * mut [ MaybeUninit < u8 > ; 40 ] )
@@ -74,25 +74,25 @@ fn main() -> ! {
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log:: info!( "stm32h5xx-hal example - SPI DMA" ) ;
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// Initialise the SPI peripheral.
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- let mut spi = dp. SPI2 . spi (
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+ let spi = dp. SPI2 . spi (
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( sck, miso, mosi) ,
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SpiConfig :: new ( spi:: MODE_0 ) ,
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1 . MHz ( ) ,
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ccdr. peripheral . SPI2 ,
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& ccdr. clocks ,
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) ;
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- let ( source_buf, dest_buf) = u8_to_u8_sequential ( ) ;
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+ let ( source_buf, dest_buf) = u8_buf_pair ( ) ;
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let channels = dp. GPDMA1 . channels ( ccdr. peripheral . GPDMA1 ) ;
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let tx_ch = channels. 0 ;
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let rx_ch = channels. 1 ;
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- let mut transfer =
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- DuplexDmaTransfer :: new ( & mut spi , tx_ch , rx_ch , source_buf , dest_buf ) ;
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- transfer . start ( ) . unwrap ( ) ;
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- transfer . wait_for_complete ( ) . unwrap ( ) ;
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- let ( _ , _ , source_buf , dest_buf ) = transfer . free ( ) . unwrap ( ) ;
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+ let mut spi = spi . use_dma_duplex ( tx_ch , rx_ch ) ;
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+
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+ let ( tx , rx ) = spi . start_dma_duplex_transfer ( dest_buf , source_buf ) . unwrap ( ) ;
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+ tx . wait_for_transfer_complete ( ) . unwrap ( ) ;
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+ rx . wait_for_transfer_complete ( ) . unwrap ( ) ;
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assert_eq ! ( source_buf, dest_buf) ;
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