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spi: use renamed/reworked DMA structures
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+24
-22
lines changed

1 file changed

+24
-22
lines changed

src/spi/dma.rs

Lines changed: 24 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@ use core::marker::PhantomData;
33
use embedded_dma::{ReadBuffer, WriteBuffer};
44

55
use crate::gpdma::{
6-
config::{Config as DmaConfig, MemoryToPeripheral, PeripheralToMemory},
7-
Channel, ChannelRegs, Transfer as DmaTransfer, Word as DmaWord,
6+
config::{DmaConfig, MemoryToPeripheral, PeripheralToMemory},
7+
Channel, ChannelRegs, DmaTransfer, DmaTransferBuilder, Word as DmaWord,
88
};
99

1010
use super::{Error, Instance, Spi, Word};
@@ -73,7 +73,7 @@ where
7373
let (_, len) = unsafe { destination.write_buffer() };
7474
let config = DmaConfig::new().with_request(SPI::rx_dma_request());
7575
let source = DmaRx::new();
76-
let transfer = DmaTransfer::peripheral_to_memory(
76+
let transfer = DmaTransferBuilder::peripheral_to_memory(
7777
config,
7878
channel,
7979
source,
@@ -109,27 +109,26 @@ where
109109
}
110110
}
111111

112-
pub struct TxDmaTransfer<'a, SPI, W: Word, CH, S> {
112+
pub struct TxDmaTransfer<'a, SPI, W: Word, CH: ChannelRegs> {
113113
spi: &'a mut Spi<SPI, W>,
114-
transfer: DmaTransfer<CH, S, DmaTx<SPI, W>, MemoryToPeripheral>,
114+
transfer: DmaTransfer<'a, CH>,
115115
}
116116

117-
impl<'a, SPI, W, CH, S> TxDmaTransfer<'a, SPI, W, CH, S>
117+
impl<'a, SPI, W, CH> TxDmaTransfer<'a, SPI, W, CH>
118118
where
119119
SPI: Instance,
120120
W: DmaWord + Word,
121121
CH: ChannelRegs,
122-
S: ReadBuffer<Word = W>,
123122
{
124-
pub fn new(
123+
pub fn new<S: ReadBuffer<Word = W>>(
125124
spi: &'a mut Spi<SPI, W>,
126-
channel: Channel<CH>,
125+
channel: &'a Channel<CH>,
127126
source: S,
128127
) -> Self {
129128
let (_, len) = unsafe { source.read_buffer() };
130129
let config = DmaConfig::new().with_request(SPI::tx_dma_request());
131130
let destination = DmaTx::new();
132-
let transfer = DmaTransfer::memory_to_peripheral(
131+
let transfer = DmaTransferBuilder::memory_to_peripheral(
133132
config,
134133
channel,
135134
source,
@@ -165,41 +164,44 @@ where
165164
}
166165
}
167166

168-
pub struct DuplexDmaTransfer<'a, SPI, W: Word, TX, RX, S, D> {
167+
pub struct DuplexDmaTransfer<'a, SPI, W: Word, TX: ChannelRegs, RX: ChannelRegs>
168+
{
169169
spi: &'a mut Spi<SPI, W>,
170-
tx_transfer: DmaTransfer<TX, S, DmaTx<SPI, W>, MemoryToPeripheral>,
171-
rx_transfer: DmaTransfer<RX, DmaRx<SPI, W>, D, PeripheralToMemory>,
170+
tx_transfer: DmaTransfer<'a, TX>,
171+
rx_transfer: DmaTransfer<'a, RX>,
172172
}
173173

174-
impl<'a, SPI, W, RX, TX, S, D> DuplexDmaTransfer<'a, SPI, W, TX, RX, S, D>
174+
impl<'a, SPI, W, RX, TX> DuplexDmaTransfer<'a, SPI, W, TX, RX>
175175
where
176176
SPI: Instance,
177177
W: Word + DmaWord,
178178
TX: ChannelRegs,
179179
RX: ChannelRegs,
180-
S: ReadBuffer<Word = W>,
181-
D: WriteBuffer<Word = W>,
182180
{
183-
pub fn new(
181+
pub fn new<S, D>(
184182
spi: &'a mut Spi<SPI, W>,
185-
tx_channel: Channel<TX>,
186-
rx_channel: Channel<RX>,
183+
tx_channel: &Channel<TX>,
184+
rx_channel: &Channel<RX>,
187185
source: S,
188186
mut destination: D,
189-
) -> Self {
187+
) -> Self
188+
where
189+
S: ReadBuffer<Word = W>,
190+
D: WriteBuffer<Word = W>,
191+
{
190192
let (_, dest_len) = unsafe { destination.write_buffer() };
191193

192194
let tx_config = DmaConfig::new().with_request(SPI::tx_dma_request());
193195
let tx_destination = DmaTx::new();
194-
let tx_transfer = DmaTransfer::memory_to_peripheral(
196+
let tx_transfer = DmaTransferBuilder::memory_to_peripheral(
195197
tx_config,
196198
tx_channel,
197199
source,
198200
tx_destination,
199201
);
200202
let rx_source = DmaRx::new();
201203
let rx_config = DmaConfig::new().with_request(SPI::rx_dma_request());
202-
let rx_transfer = DmaTransfer::peripheral_to_memory(
204+
let rx_transfer = DmaTransferBuilder::peripheral_to_memory(
203205
rx_config,
204206
rx_channel,
205207
rx_source,

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