Skip to content

Commit 11ded75

Browse files
burrbullburrbull
committed
fix
1 parent 500ad00 commit 11ded75

File tree

3 files changed

+94
-60
lines changed

3 files changed

+94
-60
lines changed

‎src/gpio.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -203,8 +203,9 @@ mod marker {
203203
impl<MODE> marker::Interruptable for Output<MODE> {}
204204
impl marker::Interruptable for Input {}
205205
impl marker::Readable for Input {}
206-
impl<const A: u8, MODE> marker::Readable for Alternate<A, MODE> {}
207206
impl marker::Readable for Output<OpenDrain> {}
207+
impl<const A: u8, Otype> marker::Interruptable for Alternate<A, Otype> {}
208+
impl<const A: u8, MODE> marker::Readable for Alternate<A, MODE> {}
208209
impl marker::Active for Input {}
209210
impl<Otype> marker::OutputSpeed for Output<Otype> {}
210211
impl<const A: u8, Otype> marker::OutputSpeed for Alternate<A, Otype> {}

‎src/gpio/alt.rs

Lines changed: 84 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,69 @@
11
mod h7;
22
pub use h7::*;
33

4+
macro_rules! extipin {
5+
($( $(#[$attr:meta])* $PX:ident,)*) => {
6+
fn make_interrupt_source(&mut self, _syscfg: &mut $crate::pac::SYSCFG) {
7+
match self {
8+
$(
9+
$(#[$attr])*
10+
Self::$PX(p) => p.make_interrupt_source(_syscfg),
11+
)*
12+
_ => {},
13+
}
14+
15+
}
16+
17+
fn trigger_on_edge(&mut self, _exti: &mut $crate::pac::EXTI, _level: $crate::gpio::Edge) {
18+
match self {
19+
$(
20+
$(#[$attr])*
21+
Self::$PX(p) => p.trigger_on_edge(_exti, _level),
22+
)*
23+
_ => {},
24+
}
25+
}
26+
27+
fn enable_interrupt(&mut self, _exti: &mut $crate::pac::EXTI) {
28+
match self {
29+
$(
30+
$(#[$attr])*
31+
Self::$PX(p) => p.enable_interrupt(_exti),
32+
)*
33+
_ => {},
34+
}
35+
}
36+
fn disable_interrupt(&mut self, _exti: &mut $crate::pac::EXTI) {
37+
match self {
38+
$(
39+
$(#[$attr])*
40+
Self::$PX(p) => p.disable_interrupt(_exti),
41+
)*
42+
_ => {},
43+
}
44+
}
45+
fn clear_interrupt_pending_bit(&mut self) {
46+
match self {
47+
$(
48+
$(#[$attr])*
49+
Self::$PX(p) => p.clear_interrupt_pending_bit(),
50+
)*
51+
_ => {},
52+
}
53+
}
54+
fn check_interrupt(&self) -> bool {
55+
match self {
56+
$(
57+
$(#[$attr])*
58+
Self::$PX(p) => p.check_interrupt(),
59+
)*
60+
_ => false,
61+
}
62+
}
63+
};
64+
}
65+
use extipin;
66+
467
macro_rules! pin {
568
( $($(#[$docs:meta])* <$name:ident, $Otype:ident> for $(no: $NoPin:ident,)? [$(
669
$(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
@@ -60,6 +123,11 @@ macro_rules! pin {
60123
}
61124
}
62125

126+
#[allow(unreachable_patterns)]
127+
impl $crate::gpio::ExtiPin for $name {
128+
extipin! { $( $(#[$attr])* $PX, )* }
129+
}
130+
63131
$(
64132
impl From<$NoPin<$Otype>> for $name {
65133
fn from(p: $NoPin<$Otype>) -> Self {
@@ -108,7 +176,7 @@ macro_rules! pin {
108176
};
109177

110178
( $($(#[$docs:meta])* <$name:ident> default:$DefaultOtype:ident for $(no: $NoPin:ident,)? [$(
111-
$(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
179+
$(#[$attr:meta])* $PX:ident<$A:literal $(, Speed::$Speed:ident)?>,
112180
)*],)*) => {
113181
$(
114182
#[derive(Debug)]
@@ -165,6 +233,11 @@ macro_rules! pin {
165233
}
166234
}
167235

236+
#[allow(unreachable_patterns)]
237+
impl<Otype> $crate::gpio::ExtiPin for $name<Otype> {
238+
extipin! { $( $(#[$attr])* $PX, )* }
239+
}
240+
168241
$(
169242
impl<Otype> From<$NoPin<Otype>> for $name<Otype> {
170243
fn from(p: $NoPin<Otype>) -> Self {
@@ -274,7 +347,7 @@ pub trait I2cCommon {
274347

275348
// I2S pins
276349
pub trait I2sCommon {
277-
type Ck;
350+
type Ck: crate::gpio::PinSpeed;
278351
type Sd;
279352
type Ws: crate::gpio::ReadPin + crate::gpio::ExtiPin;
280353
}
@@ -286,6 +359,13 @@ pub trait I2sExtPin {
286359
}
287360

288361
// QuadSPI pins
362+
363+
#[cfg(feature = "gpio-h747")]
364+
pub trait QuadSpiBanks {
365+
type Bank1;
366+
type Bank2;
367+
}
368+
#[cfg(feature = "gpio-h747")]
289369
pub trait QuadSpiBank {
290370
type Io0: crate::gpio::PinSpeed;
291371
type Io1: crate::gpio::PinSpeed;
@@ -294,6 +374,7 @@ pub trait QuadSpiBank {
294374
type Ncs: crate::gpio::PinSpeed;
295375
}
296376

377+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
297378
pub trait OctospiPort {
298379
type Clk;
299380
type Nclk;
@@ -330,7 +411,6 @@ pub trait SaiPdm {
330411
}
331412

332413
// SPDIFRX pins
333-
334414
pub trait SPdifIn<const C: u8> {
335415
type In;
336416
}
@@ -364,8 +444,7 @@ pub trait TimCPin<const C: u8> {
364444
type Ch<Otype>;
365445
}
366446

367-
/// This trait marks which GPIO pins may be used as complementary PWM channels; it should not be directly used.
368-
/// See the device datasheet 'Pin descriptions' chapter for which pins can be used with which timer PWM channels (or look at Implementors)
447+
/// Complementary output channel `C`
369448
pub trait TimNCPin<const C: u8> {
370449
type ChN<Otype>;
371450
}

‎src/gpio/alt/h7.rs

Lines changed: 8 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -3394,52 +3394,6 @@ pub mod sdmmc2 {
33943394
}
33953395
}
33963396

3397-
#[cfg(feature = "gpio-h7a2")]
3398-
pub mod spdifrx {
3399-
use super::*;
3400-
3401-
pin! {
3402-
<In1, PushPull> for [
3403-
PD7<9>,
3404-
3405-
PG11<8>,
3406-
],
3407-
3408-
<In2, PushPull> for [
3409-
PD8<9>,
3410-
3411-
PG12<8>,
3412-
],
3413-
3414-
<In3, PushPull> for [
3415-
PC4<9>,
3416-
3417-
PG8<8>,
3418-
],
3419-
3420-
<In4, PushPull> for [
3421-
PC5<9>,
3422-
3423-
PG9<8>,
3424-
],
3425-
}
3426-
3427-
use crate::pac::SPDIFRX;
3428-
impl SPdifIn<1> for SPDIFRX {
3429-
type In = In1;
3430-
}
3431-
impl SPdifIn<2> for SPDIFRX {
3432-
type In = In2;
3433-
}
3434-
impl SPdifIn<3> for SPDIFRX {
3435-
type In = In3;
3436-
}
3437-
impl SPdifIn<4> for SPDIFRX {
3438-
type In = In4;
3439-
}
3440-
}
3441-
3442-
#[cfg(any(feature = "gpio-h72", feature = "gpio-h747"))]
34433397
pub mod spdifrx1 {
34443398
use super::*;
34453399

@@ -3454,13 +3408,13 @@ pub mod spdifrx1 {
34543408

34553409
pin! {
34563410
<In1, PushPull> for [
3457-
#[cfg(feature = "gpio-h72")]
3411+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
34583412
PD7<9>,
34593413

34603414
#[cfg(feature = "gpio-h747")]
34613415
PD8<9>,
34623416

3463-
#[cfg(feature = "gpio-h72")]
3417+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
34643418
PG11<8>,
34653419

34663420
#[cfg(feature = "gpio-h747")]
@@ -3471,32 +3425,32 @@ pub mod spdifrx1 {
34713425
#[cfg(feature = "gpio-h747")]
34723426
PC4<9>,
34733427

3474-
#[cfg(feature = "gpio-h72")]
3428+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
34753429
PD8<9>,
34763430

34773431
#[cfg(feature = "gpio-h747")]
34783432
PG8<8>,
34793433

3480-
#[cfg(feature = "gpio-h72")]
3434+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
34813435
PG12<8>,
34823436
],
34833437

34843438
<In3, PushPull> for [
3485-
#[cfg(feature = "gpio-h72")]
3439+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
34863440
PC4<9>,
34873441

34883442
#[cfg(feature = "gpio-h747")]
34893443
PC5<9>,
34903444

3491-
#[cfg(feature = "gpio-h72")]
3445+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
34923446
PG8<8>,
34933447

34943448
#[cfg(feature = "gpio-h747")]
34953449
PG9<8>,
34963450
],
34973451
}
34983452

3499-
#[cfg(feature = "gpio-h72")]
3453+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
35003454
pin! {
35013455
<In4, PushPull> for [
35023456
PC5<9>,
@@ -3519,7 +3473,7 @@ pub mod spdifrx1 {
35193473
impl SPdifIn<3> for SPDIFRX {
35203474
type In = In3;
35213475
}
3522-
#[cfg(feature = "gpio-h72")]
3476+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
35233477
impl SPdifIn<4> for SPDIFRX {
35243478
type In = In4;
35253479
}

0 commit comments

Comments
 (0)