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eh-1.0.0: adc and dac
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4 files changed

+30
-27
lines changed

4 files changed

+30
-27
lines changed

examples/dac.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44

55
use cortex_m::asm;
66
use cortex_m_rt::entry;
7-
use stm32h7xx_hal::hal::Direction;
7+
use stm32h7xx_hal::qei::Direction;
88
#[macro_use]
99
mod utilities;
1010
use stm32h7xx_hal::{pac, prelude::*};

examples/temperature.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ use cortex_m_rt::entry;
1111
#[macro_use]
1212
mod utilities;
1313

14+
use embedded_hal::delay::DelayNs;
1415
use stm32h7xx_hal::{
1516
adc,
1617
delay::Delay,
@@ -73,7 +74,7 @@ fn main() -> ! {
7374
// Setup Temperature Sensor on the disabled ADC
7475
let mut channel = adc::Temperature::new();
7576
channel.enable(&adc);
76-
delay.delay_us(25_u16);
77+
delay.delay_us(25);
7778
let mut adc = adc.enable();
7879

7980
let vdda = 2.500; // Volts

src/adc.rs

Lines changed: 24 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,7 @@
1111
//! - [Using ADC1 and ADC2 in parallel](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/adc12_parallel.rs)
1212
//! - [Using ADC1 through DMA](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/adc_dma.rs)
1313
14-
use crate::hal::adc::{Channel, OneShot};
15-
use crate::hal::blocking::delay::DelayUs;
14+
use crate::hal::delay::DelayNs;
1615

1716
use core::convert::Infallible;
1817
use core::marker::PhantomData;
@@ -186,6 +185,11 @@ impl AdcCalLinear {
186185
}
187186
}
188187

188+
/// A marker trait to identify MCU pins that can be used as inputs to an ADC channel
189+
pub trait Channel<ADC> {
190+
type ID;
191+
fn channel() -> Self::ID;
192+
}
189193
macro_rules! adc_pins {
190194
($ADC:ident, $($input:ty => $chan:expr),+ $(,)*) => {
191195
$(
@@ -364,7 +368,7 @@ pub trait AdcExt<ADC>: Sized {
364368
fn adc(
365369
self,
366370
f_adc: impl Into<Hertz>,
367-
delay: &mut impl DelayUs<u8>,
371+
delay: &mut impl DelayNs,
368372
prec: Self::Rec,
369373
clocks: &CoreClocks,
370374
) -> Adc<ADC, Disabled>;
@@ -421,7 +425,7 @@ pub fn adc12(
421425
adc1: ADC1,
422426
adc2: ADC2,
423427
f_adc: impl Into<Hertz>,
424-
delay: &mut impl DelayUs<u8>,
428+
delay: &mut impl DelayNs,
425429
prec: rec::Adc12,
426430
clocks: &CoreClocks,
427431
) -> (Adc<ADC1, Disabled>, Adc<ADC2, Disabled>) {
@@ -500,7 +504,7 @@ macro_rules! adc_hal {
500504

501505
fn adc(self,
502506
f_adc: impl Into<Hertz>,
503-
delay: &mut impl DelayUs<u8>,
507+
delay: &mut impl DelayNs,
504508
prec: rec::$Rec,
505509
clocks: &CoreClocks) -> Adc<$ADC, Disabled>
506510
{
@@ -513,7 +517,7 @@ macro_rules! adc_hal {
513517
///
514518
/// Sets all configurable parameters to one-shot defaults,
515519
/// performs a boot-time calibration.
516-
pub fn $adcX(adc: $ADC, f_adc: impl Into<Hertz>, delay: &mut impl DelayUs<u8>,
520+
pub fn $adcX(adc: $ADC, f_adc: impl Into<Hertz>, delay: &mut impl DelayNs,
517521
prec: rec::$Rec, clocks: &CoreClocks
518522
) -> Self {
519523
// Consume ADC register block, produce Self with default
@@ -631,13 +635,14 @@ macro_rules! adc_hal {
631635
/// Disables Deeppowerdown-mode and enables voltage regulator
632636
///
633637
/// Note: After power-up, a [`calibration`](#method.calibrate) shall be run
634-
pub fn power_up(&mut self, delay: &mut impl DelayUs<u8>) {
638+
pub fn power_up(&mut self, delay: &mut impl DelayNs) {
635639
// Refer to RM0433 Rev 7 - Chapter 25.4.6
636640
self.rb.cr.modify(|_, w|
637641
w.deeppwd().clear_bit()
638642
.advregen().set_bit()
639643
);
640-
delay.delay_us(10_u8);
644+
645+
delay.delay_us(10);
641646

642647
// check LDORDY bit if present
643648
$(
@@ -884,6 +889,17 @@ macro_rules! adc_hal {
884889
nb::Result::Ok(result)
885890
}
886891

892+
/// Perform an ADC conversion on the specified pin
893+
pub fn read<PIN, T>(&mut self, pin: &mut PIN) -> nb::Result<T, Infallible>
894+
where
895+
PIN: Channel<$ADC, ID = u8>,
896+
T: From<u32>
897+
{
898+
self.start_conversion(pin);
899+
let res = block!(self.read_sample()).unwrap();
900+
Ok(res.into())
901+
}
902+
887903
fn check_conversion_conditions(&self) {
888904
let cr = self.rb.cr.read();
889905
// Ensure that no conversions are ongoing
@@ -1111,20 +1127,6 @@ macro_rules! adc_hal {
11111127
&mut self.rb
11121128
}
11131129
}
1114-
1115-
impl<WORD, PIN> OneShot<$ADC, WORD, PIN> for Adc<$ADC, Enabled>
1116-
where
1117-
WORD: From<u32>,
1118-
PIN: Channel<$ADC, ID = u8>,
1119-
{
1120-
type Error = ();
1121-
1122-
fn read(&mut self, pin: &mut PIN) -> nb::Result<WORD, Self::Error> {
1123-
self.start_conversion(pin);
1124-
let res = block!(self.read_sample()).unwrap();
1125-
Ok(res.into())
1126-
}
1127-
}
11281130
)+
11291131
}
11301132
}

src/dac.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ use core::marker::PhantomData;
99
use core::mem::MaybeUninit;
1010

1111
use crate::gpio::{self, Analog};
12-
use crate::hal::blocking::delay::DelayUs;
12+
use crate::hal::delay::DelayNs;
1313
use crate::rcc::{rec, ResetEnable};
1414
#[cfg(not(feature = "rm0455"))]
1515
use crate::stm32::DAC as DAC1;
@@ -127,7 +127,7 @@ macro_rules! dac {
127127
delay: &mut T,
128128
) -> $CX<$DAC, Disabled>
129129
where
130-
T: DelayUs<u32>,
130+
T: DelayNs,
131131
{
132132
let dac = unsafe { &(*$DAC::ptr()) };
133133
dac.cr.modify(|_, w| w.$en().clear_bit());
@@ -136,7 +136,7 @@ macro_rules! dac {
136136
let mut trim = 0;
137137
while true {
138138
dac.ccr.modify(|_, w| unsafe { w.$trim().bits(trim) });
139-
delay.delay_us(64_u32);
139+
delay.delay_us(64);
140140
if dac.sr.read().$cal_flag().bit() {
141141
break;
142142
}

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