Update clippy to 1.74.0 . Tidy clippy lints

Author: richardeoin

.github/workflows/clippy.yml

@@ -12,7 +12,7 @@ jobs:
       - uses: actions/checkout@v4
       - uses: dtolnay/rust-toolchain@master
         with:
-          toolchain: 1.66.0
+          toolchain: 1.74.0
           target: thumbv7em-none-eabihf
           components: clippy
       - uses: clechasseur/rs-clippy-check@v3

examples/blinky.rs

@@ -41,12 +41,10 @@ fn main() -> ! {
     let mut delay = cp.SYST.delay(ccdr.clocks);
 
     loop {
-        loop {
-            led.set_high();
-            delay.delay_ms(500_u16);
+        led.set_high();
+        delay.delay_ms(500_u16);
 
-            led.set_low();
-            delay.delay_ms(500_u16);
-        }
+        led.set_low();
+        delay.delay_ms(500_u16);
     }
 }

examples/gpio_with_input.rs

@@ -44,15 +44,13 @@ fn main() -> ! {
     let mut delay = cp.SYST.delay(ccdr.clocks);
 
     loop {
-        loop {
-            led.set_high();
-            delay.delay_ms(100_u16);
+        led.set_high();
+        delay.delay_ms(100_u16);
 
-            led.set_low();
-            delay.delay_ms(100_u16);
+        led.set_low();
+        delay.delay_ms(100_u16);
 
-            let is_high = led.with_input(|x| x.is_high());
-            info!("LED pin high? {}", is_high);
-        }
+        let is_high = led.with_input(|x| x.is_high());
+        info!("LED pin high? {}", is_high);
     }
 }

examples/independent_watchdog.rs

@@ -36,7 +36,7 @@ fn main() -> ! {
     let mut watchdog = IndependentWatchdog::new(dp.IWDG2);
 
     // RM0468
-    #[cfg(all(feature = "rm0468"))]
+    #[cfg(feature = "rm0468")]
     let mut watchdog = IndependentWatchdog::new(dp.IWDG1);
 
     info!("");

examples/system_watchdog.rs

@@ -34,7 +34,7 @@ fn main() -> ! {
     let mut watchdog = SystemWindowWatchdog::new(dp.WWDG2, &ccdr);
 
     // RM0468
-    #[cfg(all(feature = "rm0468"))]
+    #[cfg(feature = "rm0468")]
     let mut watchdog = SystemWindowWatchdog::new(dp.WWDG1, &ccdr);
 
     info!("");

src/exti.rs

@@ -257,9 +257,7 @@ impl ExtiExt for EXTI {
         let line = ev as u8;
 
         match line {
-            0..=19 | 20 | 21 => {
-                reg_for_cpu!(self, pr1).read().bits() & (1 << line) != 0
-            }
+            0..=21 => reg_for_cpu!(self, pr1).read().bits() & (1 << line) != 0,
             49 | 51 => {
                 reg_for_cpu!(self, pr2).read().bits() & (1 << (line - 32)) != 0
             }
@@ -278,7 +276,7 @@ impl ExtiExt for EXTI {
 
         unsafe {
             match line {
-                0..=19 | 20 | 21 => {
+                0..=21 => {
                     reg_for_cpu!(self, pr1).write(|w| w.bits(1 << line));
                     let _ = reg_for_cpu!(self, pr1).read();
                     let _ = reg_for_cpu!(self, pr1).read(); // Delay 2 peripheral clocks

src/lib.rs

@@ -102,15 +102,15 @@ pub use stm32h7::stm32h743 as stm32;
 pub use stm32h7::stm32h743v as stm32;
 
 // Single core with crypto
-#[cfg(any(feature = "stm32h753",))]
+#[cfg(feature = "stm32h753")]
 pub use stm32h7::stm32h753 as stm32;
-#[cfg(any(feature = "stm32h753v",))]
+#[cfg(feature = "stm32h753v")]
 pub use stm32h7::stm32h753v as stm32;
 
 // Dual core
-#[cfg(any(feature = "stm32h747cm7",))]
+#[cfg(feature = "stm32h747cm7")]
 pub use stm32h7::stm32h747cm7 as stm32;
-#[cfg(any(feature = "stm32h757cm7",))]
+#[cfg(feature = "stm32h757cm7")]
 pub use stm32h7::stm32h757cm7 as stm32;
 // TODO(rm0399): soundness of PeripheralREC macro in rcc/rec.rs
 

src/prelude.rs

@@ -39,7 +39,7 @@ pub use crate::timer::HalDisabledLpTimer as _stm32h7xx_hal_timer_HalDisabledLpTi
 pub use crate::timer::HalEnabledLpTimer as _stm32h7xx_hal_timer_HalEnabledLpTimer;
 pub use crate::timer::HalLpTimer as _stm32h7xx_hal_timer_HalLpTimer;
 pub use crate::timer::TimerExt as _stm32h7xx_hal_timer_TimerExt;
-#[cfg(all(feature = "xspi"))]
+#[cfg(feature = "xspi")]
 #[cfg_attr(docsrs, doc(cfg(feature = "xspi")))]
 pub use crate::xspi::XspiExt as _stm32h7xx_hal_xspi_XspiExt;
 pub use fugit::{ExtU32 as _, RateExtU32 as _};