File tree Expand file tree Collapse file tree 2 files changed +30
-0
lines changed Expand file tree Collapse file tree 2 files changed +30
-0
lines changed Original file line number Diff line number Diff line change @@ -350,6 +350,21 @@ uart_pins! {
350
350
}
351
351
352
352
/// Serial abstraction
353
+ ///
354
+ /// # Examples
355
+ /// ```
356
+ /// let dp = pac::Peripherals::take().unwrap();
357
+ /// let rcc = dp.RCC.constrain();
358
+ /// let ccdr = rcc.freeze();
359
+ /// let serial = Serial::usart3(
360
+ /// dp.USART3,
361
+ /// serial::config::Config::default().baudrate(115200.bps()),
362
+ /// ccdr.peripheral.USART3,
363
+ /// &ccdr.clocks
364
+ /// ).unwrap();
365
+ /// // core::fmt::Write is implemented for tx.
366
+ /// writeln!(tx, Test\r").unwrap();
367
+ /// ```
353
368
pub struct Serial < USART > {
354
369
pub ( crate ) usart : USART ,
355
370
}
Original file line number Diff line number Diff line change @@ -177,6 +177,21 @@ pub trait TimerExt<TIM> {
177
177
}
178
178
179
179
/// Hardware timers
180
+ ///
181
+ /// # Examples
182
+ ///
183
+ /// ```rust
184
+ /// let dp = pac::Peripherals::take().unwrap();
185
+ /// let rcc = dp.RCC.constrain();
186
+ /// let ccdr = rcc.freeze();
187
+ /// let mut timer = Timer::tim1(dp.TIM1, ccdr.peripheral.TIM1, &ccdr.clocks);
188
+ /// timer.start(1.hz());
189
+ /// loop {
190
+ /// // Do something here and then block for 1 second
191
+ /// // do_something();
192
+ /// block(timer.wait()).unwrap();
193
+ /// }
194
+ /// ```
180
195
#[ derive( Debug ) ]
181
196
pub struct Timer < TIM > {
182
197
clk : u32 ,
You can’t perform that action at this time.
0 commit comments