Upgrade stm32l0 to v0.15.1 (#215)

* Upgrade stm32l0 crate

* Fix variant names from stm32-l0 upgrade

* Remove unnecessary unsafe blocks from stm32-rs upgrade

* Upgrade other outdated dependencies

* Upgrade dev dependencies, fix examples

* Remove usage of 'cross' in CI

* Reduce dependency version churn

* Changelog entry

* Format changelog with VSCode prettier format-on-save

Author: jamwaffles

.github/workflows/ci.yaml

@@ -34,7 +34,6 @@ jobs:
           target: thumbv6m-none-eabi
       - uses: actions-rs/cargo@v1
         with:
-          use-cross: true
           command: clippy
           # dummy feature to satisfy build.rs
           args: --features mcu-STM32L083VZTx -- -D warnings
@@ -50,7 +49,6 @@ jobs:
           target: thumbv6m-none-eabi
       - uses: actions-rs/cargo@v1
         with:
-          use-cross: true
           command: package
           args: --no-verify
   build_and_test:
@@ -80,6 +78,5 @@ jobs:
         env:
           RUSTFLAGS: "-D warnings"
         with:
-          use-cross: true
           command: build
           args: --release --examples --features "${{ matrix.features }}"

CHANGELOG.md

@@ -4,8 +4,6 @@ All notable changes to this project will be documented in this file.
 
 The format is based on [Keep a Changelog](http://keepachangelog.com/).
 
-
-
 ## [Unreleased]
 
 <!-- When making a PR, please update this section. Note: This document should
@@ -17,14 +15,34 @@ forget to update the links at the bottom of the changelog as well.-->
 
 ### Breaking Changes
 
+- Upgrade `stm32l0` to latest version, and other dependency updates ([#215]):
+
+  `dependencies`
+
+  | crate       | from   | to     |
+  | ----------- | ------ | ------ |
+  | cast        | 0.2.2  | 0.3.0  |
+  | cortex-m-rt | 0.6.8  | 0.7.0  |
+  | rtcc        | 0.2    | 0.3.0  |
+  | stm32l0     | 0.13.0 | 0.15.1 |
+
+  `dev-dependencies`
+
+  | crate                | from  | to    |
+  | -------------------- | ----- | ----- |
+  | aligned              | 0.3.1 | 0.4.1 |
+  | cortex-m-rtic        | 0.5.6 | 1.1.3 |
+  | cortex-m-semihosting | 0.3.2 | 0.5.0 |
+  | panic-semihosting    | 0.5.1 | 0.6.0 |
+
 ### Non-Breaking Changes
 
 ### Fixes
+
 - Add other possible pins for SPI1 for L0x1 family
 
 ### Documentation
 
-
 ## [v0.9.0] - 2021-12-11
 
 ### Additions
@@ -45,61 +63,57 @@ forget to update the links at the bottom of the changelog as well.-->
 
 - Fix Cargo features used by docs.rs ([#203])
 
-
 ## [v0.8.0] - 2021-11-04
 
 ### Additions
 
 - Add `Timer::new` to create timer without starting. ([#152])
-- Add (untested) example `temperature` ([#161]) which uses `adc` to read the
-  internal temperature and also an externally connected TMP36 analog sensor.
-- Add `Pwm::set_frequency` to allow dynamically changing the underlying PWM timer's
-  frequency. This was previously impossible without resorting to `unsafe` because the
-  channels where moved out of the timer struct and Rust's ownership rules forbade us
-  to borrow the timer to call `set_frequency`. ([#174])
-- Add Cargo features for flash and RAM sizes allowing to pass the correct sizes to
-  the linker instead of having a default for the whole sub-family. ([#173])
+- Add (untested) example `temperature` ([#161]) which uses `adc` to read the internal temperature
+  and also an externally connected TMP36 analog sensor.
+- Add `Pwm::set_frequency` to allow dynamically changing the underlying PWM timer's frequency. This
+  was previously impossible without resorting to `unsafe` because the channels where moved out of
+  the timer struct and Rust's ownership rules forbade us to borrow the timer to call
+  `set_frequency`. ([#174])
+- Add Cargo features for flash and RAM sizes allowing to pass the correct sizes to the linker
+  instead of having a default for the whole sub-family. ([#173])
 
 ### Breaking Changes
 
-- Migrate from custom `Hertz` implementation to [`embedded-time`](https://crates.io/crates/embedded-time) ([#183])
+- Migrate from custom `Hertz` implementation to
+  [`embedded-time`](https://crates.io/crates/embedded-time) ([#183])
 - Add `enable` to `GeneralPurposeTimer`
 - `Instance::clock_frequency` is now an associated function and doesn't take `&self` anymore.
 - Build script requires that exactly one `flash-*` and one `ram-*` feature is enabled. They are
-  enabled automatically when using an `mcu-*` feature, but if you manually selected the other features
-  before this will break the build because of the missing features.
-- The `rtc::RTC` struct has been renamed to `rtc::Rtc` and includes a big
-  refactoring and a few API changes. It now implements the traits from the
-  [rtcc crate](https://docs.rs/rtcc/) and uses date/time types from Chrono.
-- When downgrading GPIO pins, not only the pin number but also the port
-  identifier is erased. To update your code, replace
-  `PA`/`PB`/`PC`/`PD`/`PE`/`PH` with `Pin`. ([#190])
+  enabled automatically when using an `mcu-*` feature, but if you manually selected the other
+  features before this will break the build because of the missing features.
+- The `rtc::RTC` struct has been renamed to `rtc::Rtc` and includes a big refactoring and a few API
+  changes. It now implements the traits from the [rtcc crate](https://docs.rs/rtcc/) and uses
+  date/time types from Chrono.
+- When downgrading GPIO pins, not only the pin number but also the port identifier is erased. To
+  update your code, replace `PA`/`PB`/`PC`/`PD`/`PE`/`PH` with `Pin`. ([#190])
 
 ### Non-Breaking Changes
 
-- The crate now has an optional `rtc` feature (enabled by default). The `rtc`
-  module is only available if that feature is enabled. Enabling the feature
-  also pulls in the `rtcc` and `chrono` dependencies, in oder to support a
-  richer calendar / clock API.
+- The crate now has an optional `rtc` feature (enabled by default). The `rtc` module is only
+  available if that feature is enabled. Enabling the feature also pulls in the `rtcc` and `chrono`
+  dependencies, in oder to support a richer calendar / clock API.
 
 ### Fixes
 
 - Fixed potential race condition when flushing the tx serial buffer.
-- Fixed RTC year handling. Previously, the implementation incorrectly assumed
-  that the BCD year 00 corresponds to 1970, but this results in a wrong leap
-  year calculation. The correct time base is the year 2000.
-
+- Fixed RTC year handling. Previously, the implementation incorrectly assumed that the BCD year 00
+  corresponds to 1970, but this results in a wrong leap year calculation. The correct time base is
+  the year 2000.
 
 ## [v0.7.0] - 2021-03-10
 
 ### Additions
 
 - Timers: Add support for TIM6 ([#101])
-- Timers: Implement `LinkedTimer` ([#115]). It is initialized with two hardware
-  timers (either TIM2/TIM3 or TIM21/TIM22). The two timers are configured in
-  master/slave mode so that an overflow of the master timer triggers an update
-  on the slave timer. This way, two 16 bit timers can be combined to a single
-  32 bit timer.  (The STM32L0 does not have 32 bit timers.)
+- Timers: Implement `LinkedTimer` ([#115]). It is initialized with two hardware timers (either
+  TIM2/TIM3 or TIM21/TIM22). The two timers are configured in master/slave mode so that an overflow
+  of the master timer triggers an update on the slave timer. This way, two 16 bit timers can be
+  combined to a single 32 bit timer. (The STM32L0 does not have 32 bit timers.)
 - Remove config tests that prevented stm32l0x1 devices from using ADC with DMA ([#124])
 - Add `enable_lse` method to RCC structure that configures LSE ([#130])
 - Expose factory calibration data ([#121])
@@ -124,8 +138,8 @@ forget to update the links at the bottom of the changelog as well.-->
 ### Fixes
 
 - I2C: Before starting new transaction ensure that both TX and RX buffers are empty ([#98])
-- Detect rollover using positions rather than DMA flags ([#127]). This fixes a
-  faulty DMA buffer overflow in `adc_trig` example ([#104]).
+- Detect rollover using positions rather than DMA flags ([#127]). This fixes a faulty DMA buffer
+  overflow in `adc_trig` example ([#104]).
 - Maximum frequency for stm32l0 increased to 32MHz ([#129])
 - GPIO: Fix `Pin::into_pull_down_input` ([#142])
 
@@ -135,33 +149,25 @@ forget to update the links at the bottom of the changelog as well.-->
 - Port examples to RTFM/RTIC 0.5 ([#100], [#116])
 - Improve README ([#119])
 
-
-
 ## [v0.6.2] - 2020-05-03
 
 _Not yet tracked in this changelog._
 
-
-
 ## [v0.6.1] - 2020-04-08
 
 _Not yet tracked in this changelog._
 
-
-
 ## [v0.6.0] - 2020-04-05
 
 _Not yet tracked in this changelog._
 
-
-
 ## v0.5.0 - 2019-12-02
 
-*Not yet tracked in this changelog.*
-
-
+_Not yet tracked in this changelog._
 
 <!-- Links to pull requests and issues. -->
+
+[#215]: https://github.com/stm32-rs/stm32l0xx-hal/pull/215
 [#208]: https://github.com/stm32-rs/stm32l0xx-hal/pull/208
 [#206]: https://github.com/stm32-rs/stm32l0xx-hal/pull/206
 [#203]: https://github.com/stm32-rs/stm32l0xx-hal/pull/203
@@ -202,7 +208,8 @@ _Not yet tracked in this changelog._
 [#98]: https://github.com/stm32-rs/stm32l0xx-hal/pull/98
 
 <!-- Links to version diffs. -->
-[Unreleased]: https://github.com/stm32-rs/stm32l0xx-hal/compare/v0.9.0...HEAD
+
+[unreleased]: https://github.com/stm32-rs/stm32l0xx-hal/compare/v0.9.0...HEAD
 [v0.9.0]: https://github.com/stm32-rs/stm32l0xx-hal/compare/v0.8.0...v0.9.0
 [v0.8.0]: https://github.com/stm32-rs/stm32l0xx-hal/compare/v0.7.0...v0.8.0
 [v0.7.0]: https://github.com/stm32-rs/stm32l0xx-hal/compare/v0.6.2...v0.7.0

Cargo.toml

@@ -22,24 +22,24 @@ targets = ["thumbv6m-none-eabi"]
 
 [dependencies]
 as-slice = "0.2.1"
-cast = { version = "0.2.2", default-features = false }
-cortex-m =  "0.7.0"
-cortex-m-rt = "0.6.8"
+cast = { version = "0.3.0", default-features = false }
+cortex-m = "0.7.0"
+cortex-m-rt = "0.7.0"
 embedded-hal = { version = "0.2.3", features = ["unproven"] }
 embedded-time = "0.12.0"
 nb = "1.0.0"
-rtcc = { version = "0.2", optional = true }
-stm32l0 = "0.13.0"
+rtcc = { version = "0.3.0", optional = true }
+stm32l0 = "0.15.1"
 stm32-usbd = { version = "0.6.0", optional = true }
 void = { version = "1.0.2", default-features = false }
 
 [dev-dependencies]
-aligned = "0.3.1"
-cortex-m-rtic = "0.5.6"
-cortex-m-semihosting = "0.3.2"
+aligned = "0.4.1"
+cortex-m-rtic = "1.1.3"
+cortex-m-semihosting = "0.5.0"
 heapless = "0.7.1"
 panic-halt = "0.2.0"
-panic-semihosting = "0.5.1"
+panic-semihosting = "0.6.0"
 usb-device = "0.2.3"
 usbd-serial = "0.1.0"
 

examples/button_irq_rtic.rs

@@ -1,28 +1,31 @@
-// #![deny(warnings)]
+#![deny(warnings)]
 #![deny(unsafe_code)]
 #![no_main]
 #![no_std]
 
-extern crate panic_halt;
-
+use panic_halt as _;
 use rtic::app;
-use stm32l0xx_hal::{
-    exti::{Exti, ExtiLine, GpioLine, TriggerEdge},
-    gpio::*,
-    prelude::*,
-    rcc::Config,
-    syscfg::SYSCFG,
-};
 
 #[app(device = stm32l0xx_hal::pac, peripherals = true)]
-const APP: () = {
-    struct Resources {
+mod app {
+    use stm32l0xx_hal::{
+        exti::{Exti, ExtiLine, GpioLine, TriggerEdge},
+        gpio::*,
+        prelude::*,
+        rcc::Config,
+        syscfg::SYSCFG,
+    };
+
+    #[shared]
+    struct Shared {}
+
+    #[local]
+    struct Local {
         led: Pin<Output<PushPull>>,
-        int: Exti,
     }
 
     #[init]
-    fn init(ctx: init::Context) -> init::LateResources {
+    fn init(ctx: init::Context) -> (Shared, Local, init::Monotonics) {
         let device = ctx.device;
 
         // Configure the clock.
@@ -46,23 +49,21 @@ const APP: () = {
         exti.listen_gpio(&mut syscfg, button.port(), line, TriggerEdge::Falling);
 
         // Return the initialised resources.
-        init::LateResources { led, int: exti }
+        (Shared {}, Local { led }, init::Monotonics())
     }
 
-    #[task(binds = EXTI0_1, resources = [led])]
-    fn EXTI0_1(ctx: EXTI0_1::Context) {
-        static mut STATE: bool = false;
-
+    #[task(binds = EXTI0_1, local = [ led, state: bool = false ])]
+    fn exti0_1(ctx: exti0_1::Context) {
         // Clear the interrupt flag.
         Exti::unpend(GpioLine::from_raw_line(0).unwrap());
 
         // Change the LED state on each interrupt.
-        if *STATE {
-            ctx.resources.led.set_low().unwrap();
-            *STATE = false;
+        if *ctx.local.state {
+            ctx.local.led.set_low().unwrap();
+            *ctx.local.state = false;
         } else {
-            ctx.resources.led.set_high().unwrap();
-            *STATE = true;
+            ctx.local.led.set_high().unwrap();
+            *ctx.local.state = true;
         }
     }
-};
+}

examples/mco.rs

@@ -27,13 +27,13 @@ fn main() -> ! {
     let gpioa = dp.GPIOA.split(&mut rcc);
 
     // Source MCO from HSI16, configure prescaler to divide by 8 to get 2MHz output.
-    rcc.configure_mco(MCOSEL_A::HSI16, MCOPRE_A::DIV8, (gpioa.pa8, gpioa.pa9));
+    rcc.configure_mco(MCOSEL_A::Hsi16, MCOPRE_A::Div8, (gpioa.pa8, gpioa.pa9));
 
     // Individual pins can also be set by passing them directly:
-    // rcc.enable_mco(MCOSEL_A::HSI16, MCOPRE_A::DIV8, gpioa.pa8);
+    // rcc.enable_mco(MCOSEL_A::Hsi16, MCOPRE_A::Div8, gpioa.pa8);
 
     // Or for larger devices, all 3 MCO pins can be configured:
-    // rcc.configure_mco(MCOSEL_A::HSI16, MCOPRE_A::DIV8, (gpioa.pa8, gpioa.pa9, gpiob.pb13));
+    // rcc.configure_mco(MCOSEL_A::Hsi16, MCOPRE_A::Div8, (gpioa.pa8, gpioa.pa9, gpiob.pb13));
 
     // Probe PA8 or PA9 to see generated 2MHz MCO signal.
     loop {}

examples/temperature.rs

@@ -110,10 +110,10 @@ fn main() -> ! {
 
     loop {
         let mcu_value = mcutemp.read_tempc(&mut adc);
-        hprintln!("inaccurate MCU temp: {}", mcu_value).unwrap();
+        hprintln!("inaccurate MCU temp: {}", mcu_value);
 
         let tmp36_mv: u32 = tmp36.read_mv(&mut adc);
         let tmp36_temp: i32 = tmp36.read_tempc(&mut adc);
-        hprintln!("external sensor: {} mV,   {} C.", tmp36_mv, tmp36_temp).unwrap();
+        hprintln!("external sensor: {} mV,   {} C.", tmp36_mv, tmp36_temp);
     }
 }