Remove outdated comment

hannobraun · hannobraun · commit 79cfc928d0ea · 2020-03-25T11:25:40.000+01:00
diff --git a/src/adc.rs b/src/adc.rs
@@ -265,11 +265,6 @@ impl<State> Adc<State> {
             Chan: Channel<Adc<Ready>, ID=u8>,
     {
         self.rb.cfgr1.modify(|_, w| {
-            // Safe, as `self.precision` is of type `Precision`, which defines
-            // only valid values.
-            //
-            // The `bits` method is not unsafe on STM32L0x1, so we need to
-            // suppress the warning there.
             w
                 .res().bits(self.precision as u8)
                 .cont().bit(cont)

Original file line number	Diff line number	Diff line change
`@@ -265,11 +265,6 @@ impl<State> Adc<State> {`
`265`	`265`	`Chan: Channel<Adc<Ready>, ID=u8>,`
`266`	`266`	`{`
`267`	`267`	`self.rb.cfgr1.modify(\|_, w\| {`
`268`		- // Safe, as `self.precision` is of type `Precision`, which defines
`269`		`- // only valid values.`
`270`		`- //`
`271`		- // The `bits` method is not unsafe on STM32L0x1, so we need to
`272`		`- // suppress the warning there.`
`273`	`268`	`w`
`274`	`269`	`.res().bits(self.precision as u8)`
`275`	`270`	`.cont().bit(cont)`