@@ -56,7 +56,7 @@ pub struct Spi<SPI, PINS> {
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}
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macro_rules! hal {
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- ( $( $SPIX: ident: ( $spiX: ident, $APBX: ident, $spiXen: ident, $spiXrst: ident, $pclkX: ident) , ) +) => {
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+ ( $( $SPIX: ident: ( $spiX: ident, $spiX_slave : ident , $ APBX: ident, $spiXen: ident, $spiXrst: ident, $pclkX: ident) , ) +) => {
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$(
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impl <SCK , MISO , MOSI > Spi <$SPIX, ( SCK , MISO , MOSI ) > {
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/// Configures the SPI peripheral to operate in full duplex master mode
@@ -126,6 +126,59 @@ macro_rules! hal {
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Spi { spi, pins }
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}
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+ pub fn $spiX_slave( spi: $SPIX, pins: ( SCK , MISO , MOSI ) , mode: Mode , apb2: & mut $APBX, ) -> Self
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+ where
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+ SCK : SckPin <$SPIX>,
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+ MISO : MisoPin <$SPIX>,
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+ MOSI : MosiPin <$SPIX>,
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+ {
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+ // enable or reset $SPIX
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+ apb2. enr( ) . modify( |_, w| w. $spiXen( ) . set_bit( ) ) ;
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+ apb2. rstr( ) . modify( |_, w| w. $spiXrst( ) . set_bit( ) ) ;
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+ apb2. rstr( ) . modify( |_, w| w. $spiXrst( ) . clear_bit( ) ) ;
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+
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+ // CPOL: polarity
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+ // CPHA: phase
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+ // BIDIMODE: 2 line unidirectional (full duplex)
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+ // LSBFIRST: MSB first
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+ // CRCEN: hardware CRC calculation disabled
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+ // MSTR: master mode
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+ // SSM: disable software slave management (NSS pin not free for other uses)
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+ // SPE: SPI disabled
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+ spi. cr1. write( |w| {
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+ w. cpol( )
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+ . bit( mode. polarity == Polarity :: IdleHigh )
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+ . cpha( )
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+ . bit( mode. phase == Phase :: CaptureOnSecondTransition )
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+ . bidimode( )
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+ . clear_bit( )
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+ . lsbfirst( )
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+ . clear_bit( )
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+ . crcen( )
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+ . clear_bit( )
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+ . ssm( )
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+ . clear_bit( )
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+ . mstr( )
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+ . clear_bit( )
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+ } ) ;
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+
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+ // DS: 8-bit data size
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+ // FRXTH: RXNE event is generated if the FIFO level is greater than or equal to
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+ // 8-bit
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+ spi. cr2
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+ . write( |w| unsafe { w. ds( ) . bits( 0b111 ) . frxth( ) . set_bit( ) } ) ;
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+
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+ // SPE: SPI enabled
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+ spi. cr1. write( |w| w. spe( ) . set_bit( ) ) ;
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+
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+ Spi { spi, pins }
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+ }
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+
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+ pub fn clear_overrun( & mut self ) {
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+ self . spi. dr. read( ) . dr( ) ;
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+ self . spi. sr. read( ) . ovr( ) ;
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+ }
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+
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/// Change the baud rate of the SPI
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pub fn reclock<F >( & mut self , freq: F , clocks: Clocks )
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where F : Into <Hertz >
@@ -226,7 +279,7 @@ use crate::stm32::SPI1;
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feature = "stm32l4x6"
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) ) ]
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hal ! {
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- SPI1 : ( spi1, APB2 , spi1en, spi1rst, pclk2) ,
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+ SPI1 : ( spi1, spi1_slave , APB2 , spi1en, spi1rst, pclk2) ,
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}
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#[ cfg( any(
@@ -259,7 +312,7 @@ use crate::{gpio::AF6, stm32::SPI3};
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feature = "stm32l4x6" ,
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) ) ]
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hal ! {
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- SPI3 : ( spi3, APB1R1 , spi3en, spi3rst, pclk1) ,
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+ SPI3 : ( spi3, spi3_slave , APB1R1 , spi3en, spi3rst, pclk1) ,
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}
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#[ cfg( any(
@@ -291,7 +344,7 @@ use crate::stm32::SPI2;
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feature = "stm32l4x6" ,
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) ) ]
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hal ! {
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- SPI2 : ( spi2, APB1R1 , spi2en, spi2rst, pclk1) ,
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+ SPI2 : ( spi2, spi2_slave , APB1R1 , spi2en, spi2rst, pclk1) ,
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}
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#[ cfg( any(
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