Removed uneedded operations on channel gpio (schmit trigger) added the read & read_unchecked apis, read verifies that the user is trying to read the pin that the acq started on, read_unchecked returns the result of the cnt register

Author: MabezDev

.vscode/launch.json

@@ -7,7 +7,7 @@
         {
             "type": "gdb",
             "request": "attach",
-            "name": "STM32F1",
+            "name": "Debug",
             // "gdbpath" : "/home/mabez/programs/gcc-arm-none-eabi-5_4-2016q3/bin/arm-none-eabi-gdb",
             "gdbpath" : "/home/mabez/programs/gcc-arm-none-eabi-7-2017-q4-major/bin/arm-none-eabi-gdb",
             "debugger_args": [
@@ -25,5 +25,26 @@
                 "step"
             ]
         },
+        {
+            "type": "gdb",
+            "request": "attach",
+            "name": "Release",
+            // "gdbpath" : "/home/mabez/programs/gcc-arm-none-eabi-5_4-2016q3/bin/arm-none-eabi-gdb",
+            "gdbpath" : "/home/mabez/programs/gcc-arm-none-eabi-7-2017-q4-major/bin/arm-none-eabi-gdb",
+            "debugger_args": [
+                "-nx" // dont use the .gdbinit file
+            ],
+            "executable": "./target/thumbv7em-none-eabi/release/examples/touch",
+            "remote": true,
+            "target": ":3333",
+            "cwd": "${workspaceRoot}",
+            "autorun": [
+                "set print asm-demangle on",
+                "monitor arm semihosting enable",
+                "load",
+                // "break main",
+                "step"
+            ]
+        },
     ]
 }

examples/touch.rs

@@ -52,6 +52,8 @@ fn main() -> ! {
     loop {
         let touched = tsc.acquire(&mut c1).unwrap();
         let _touched_c2 = tsc.acquire(&mut c2).unwrap();
+        // try and pass c1, it will detect an error!
+        let _touched_c2_again = tsc.read(&mut c2).unwrap();
         if touched < threshold {
             led.set_high();
         } else {

src/tsc.rs

@@ -13,6 +13,14 @@ pub enum Event {
     EndOfAcquisition
 }
 
+#[derive(Debug)]
+pub enum Error {
+    /// Max count error
+    MaxCountError,
+    /// Wrong GPIO for reading
+    InvalidPin
+}
+
 // TODO macro to impl all possible channel/sample pin combinations
 pub trait SamplePin<TSC> {
     const GROUP: u32;
@@ -148,35 +156,45 @@ impl<SPIN> Tsc<SPIN> {
     }
 
     /// Blocks waiting for a acquisition to complete or for a Max Count Error
-    pub fn acquire<PIN>(&self, input: &mut PIN) -> Result<u16, Event>
+    pub fn acquire<PIN>(&self, input: &mut PIN) -> Result<u16, Error>
         where PIN: ChannelPin<TSC>
     {
-        let bit_pos = PIN::OFFSET + (4 * (PIN::GROUP - 1));
-        
-        // disable Schmitt trigger hysteresis
-        self.tsc.iohcr.write(|w| unsafe {
-            w.bits(1 << bit_pos)
-        });
-
+        // start the acq
         self.start(input);
 
         let result = loop {
             let isr = self.tsc.isr.read();
             if isr.eoaf().bit_is_set() {
-                break Ok(self.tsc.iog2cr.read().cnt().bits())
+                break Ok(self.read_unchecked())
             } else if isr.mcef().bit_is_set() {
-                break Err(Event::MaxCountError)
+                break Err(Error::MaxCountError)
             }
         };
 
-        // re-enable Schmitt trigger hysteresis
-        self.tsc.iohcr.write(|w| unsafe {
-            w.bits(0 << bit_pos)
-        });
-
         result
     }
 
+    /// Reads the tsc group 2 count register
+    pub fn read<PIN>(&self, _input: &mut PIN) -> Result<u16, Error>
+        where PIN: ChannelPin<TSC>
+    {
+        let bit_pos = PIN::OFFSET + (4 * (PIN::GROUP - 1));
+        // Read the current channel config
+        let channel = self.tsc.ioccr.read().bits();
+        // if they are equal we have the right pin
+        if channel == (1 << bit_pos) {
+            Ok(self.read_unchecked())
+        } else {
+            Err(Error::InvalidPin)
+        }
+    }
+
+    /// Reads the tsc group 2 count register
+    /// WARNING, just returns the contents of the register! No validation of the correct pin 
+    pub fn read_unchecked(&self) -> u16 {
+        self.tsc.iog2cr.read().cnt().bits()
+    }
+
     /// Enables an interrupt event
     pub fn listen(&mut self, event: Event){
         match event {