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bus_struct
1 parent dc51e2d commit 35e66be

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2 files changed

+49
-138
lines changed

2 files changed

+49
-138
lines changed

‎src/i2c.rs

Lines changed: 10 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ use crate::hal::blocking::i2c::{Read, Write, WriteRead};
77
use crate::pac::I2C4;
88
use crate::pac::{i2c1, I2C1, I2C2, I2C3};
99

10-
use crate::rcc::{Clocks, APB1R1};
10+
use crate::rcc::{Clocks, APB1R1, APB1R2};
1111
use crate::time::Hertz;
1212
use cast::{u16, u8};
1313
use core::ops::Deref;
@@ -161,37 +161,32 @@ impl Config {
161161
}
162162

163163
macro_rules! hal {
164-
($i2c_type: ident, $enr: ident, $rstr: ident, $i2cX: ident, $i2cXen: ident, $i2cXrst: ident) => {
164+
($i2c_type: ident, $APB: ident, $i2cX: ident, $i2cXen: ident, $i2cXrst: ident) => {
165165
impl<SCL, SDA> I2c<$i2c_type, (SCL, SDA)> {
166-
pub fn $i2cX(
167-
i2c: $i2c_type,
168-
pins: (SCL, SDA),
169-
config: Config,
170-
apb1: &mut APB1R1,
171-
) -> Self
166+
pub fn $i2cX(i2c: $i2c_type, pins: (SCL, SDA), config: Config, apb1: &mut $APB) -> Self
172167
where
173168
SCL: SclPin<$i2c_type>,
174169
SDA: SdaPin<$i2c_type>,
175170
{
176-
apb1.$enr().modify(|_, w| w.$i2cXen().set_bit());
177-
apb1.$rstr().modify(|_, w| w.$i2cXrst().set_bit());
178-
apb1.$rstr().modify(|_, w| w.$i2cXrst().clear_bit());
171+
apb1.enr().modify(|_, w| w.$i2cXen().set_bit());
172+
apb1.rstr().modify(|_, w| w.$i2cXrst().set_bit());
173+
apb1.rstr().modify(|_, w| w.$i2cXrst().clear_bit());
179174
Self::new(i2c, pins, config)
180175
}
181176
}
182177
};
183178
}
184179

185-
hal!(I2C1, enr, rstr, i2c1, i2c1en, i2c1rst);
186-
hal!(I2C2, enr, rstr, i2c2, i2c2en, i2c2rst);
187-
hal!(I2C3, enr, rstr, i2c3, i2c3en, i2c3rst);
180+
hal!(I2C1, APB1R1, i2c1, i2c1en, i2c1rst);
181+
hal!(I2C2, APB1R1, i2c2, i2c2en, i2c2rst);
182+
hal!(I2C3, APB1R1, i2c3, i2c3en, i2c3rst);
188183

189184
// This peripheral is not present on
190185
// STM32L471XX and STM32L431XX
191186
// STM32L432XX and STM32l442XX
192187
// STM32L486XX and STM32L476XX
193188
#[cfg(any(feature = "stm32l4x1", feature = "stm32l4x2", feature = "stm32l4x6"))]
194-
hal!(I2C4, enr2, rstr2, i2c4, i2c4en, i2c4rst);
189+
hal!(I2C4, APB1R2, i2c4, i2c4en, i2c4rst);
195190

196191
impl<SCL, SDA, I2C> I2c<I2C, (SCL, SDA)>
197192
where

‎src/rcc.rs

Lines changed: 39 additions & 123 deletions
Original file line numberDiff line numberDiff line change
@@ -63,12 +63,12 @@ pub trait RccExt {
6363
impl RccExt for RCC {
6464
fn constrain(self) -> Rcc {
6565
Rcc {
66-
ahb1: AHB1 { _0: () },
67-
ahb2: AHB2 { _0: () },
68-
ahb3: AHB3 { _0: () },
69-
apb1r1: APB1R1 { _0: () },
70-
apb1r2: APB1R2 { _0: () },
71-
apb2: APB2 { _0: () },
66+
ahb1: AHB1::new(),
67+
ahb2: AHB2::new(),
68+
ahb3: AHB3::new(),
69+
apb1r1: APB1R1::new(),
70+
apb1r2: APB1R2::new(),
71+
apb2: APB2::new(),
7272
bdcr: BDCR { _0: () },
7373
csr: CSR { _0: () },
7474
crrcr: CRRCR { _0: () },
@@ -181,129 +181,45 @@ impl BDCR {
181181
}
182182
}
183183

184-
/// AMBA High-performance Bus 1 (AHB1) registers
185-
pub struct AHB1 {
186-
_0: (),
187-
}
188-
189-
impl AHB1 {
190-
// TODO remove `allow`
191-
#[allow(dead_code)]
192-
pub(crate) fn enr(&mut self) -> &rcc::AHB1ENR {
193-
// NOTE(unsafe) this proxy grants exclusive access to this register
194-
unsafe { &(*RCC::ptr()).ahb1enr }
195-
}
196-
197-
// TODO remove `allow`
198-
#[allow(dead_code)]
199-
pub(crate) fn rstr(&mut self) -> &rcc::AHB1RSTR {
200-
// NOTE(unsafe) this proxy grants exclusive access to this register
201-
unsafe { &(*RCC::ptr()).ahb1rstr }
202-
}
203-
}
204-
205-
/// AMBA High-performance Bus 2 (AHB2) registers
206-
pub struct AHB2 {
207-
_0: (),
208-
}
209-
210-
impl AHB2 {
211-
pub(crate) fn enr(&mut self) -> &rcc::AHB2ENR {
212-
// NOTE(unsafe) this proxy grants exclusive access to this register
213-
unsafe { &(*RCC::ptr()).ahb2enr }
214-
}
215-
216-
pub(crate) fn rstr(&mut self) -> &rcc::AHB2RSTR {
217-
// NOTE(unsafe) this proxy grants exclusive access to this register
218-
unsafe { &(*RCC::ptr()).ahb2rstr }
219-
}
220-
}
221-
222-
/// AMBA High-performance Bus (AHB3) registers
223-
pub struct AHB3 {
224-
_0: (),
225-
}
226-
227-
impl AHB3 {
228-
// TODO remove `allow`
229-
#[allow(dead_code)]
230-
pub(crate) fn enr(&mut self) -> &rcc::AHB3ENR {
231-
// NOTE(unsafe) this proxy grants exclusive access to this register
232-
unsafe { &(*RCC::ptr()).ahb3enr }
233-
}
234-
235-
// TODO remove `allow`
236-
#[allow(dead_code)]
237-
pub(crate) fn rstr(&mut self) -> &rcc::AHB3RSTR {
238-
// NOTE(unsafe) this proxy grants exclusive access to this register
239-
unsafe { &(*RCC::ptr()).ahb3rstr }
240-
}
241-
}
242-
243-
/// Advanced Peripheral Bus 1 (APB1) register 1 registers
244-
pub struct APB1R1 {
245-
_0: (),
246-
}
247-
248-
impl APB1R1 {
249-
pub(crate) fn enr(&mut self) -> &rcc::APB1ENR1 {
250-
// NOTE(unsafe) this proxy grants exclusive access to this register
251-
unsafe { &(*RCC::ptr()).apb1enr1 }
252-
}
253-
254-
pub(crate) fn rstr(&mut self) -> &rcc::APB1RSTR1 {
255-
// NOTE(unsafe) this proxy grants exclusive access to this register
256-
unsafe { &(*RCC::ptr()).apb1rstr1 }
257-
}
258-
259-
#[cfg(not(any(feature = "stm32l4x3", feature = "stm32l4x5")))]
260-
pub(crate) fn enr2(&mut self) -> &rcc::APB1ENR2 {
261-
// NOTE(unsafe) this proxy grants exclusive access to this register
262-
unsafe { &(*RCC::ptr()).apb1enr2 }
263-
}
184+
macro_rules! bus_struct {
185+
($($busX:ident => ($EN:ident, $en:ident, $SMEN:ident, $smen:ident, $RST:ident, $rst:ident, $doc:literal),)+) => {
186+
$(
187+
#[doc = $doc]
188+
pub struct $busX {
189+
_0: (),
190+
}
264191

265-
#[cfg(not(any(feature = "stm32l4x3", feature = "stm32l4x5")))]
266-
pub(crate) fn rstr2(&mut self) -> &rcc::APB1RSTR2 {
267-
// NOTE(unsafe) this proxy grants exclusive access to this register
268-
unsafe { &(*RCC::ptr()).apb1rstr2 }
269-
}
270-
}
192+
impl $busX {
193+
pub(crate) fn new() -> Self {
194+
Self { _0: () }
195+
}
271196

272-
/// Advanced Peripheral Bus 1 (APB1) register 2 registers
273-
pub struct APB1R2 {
274-
_0: (),
275-
}
197+
pub(crate) fn enr(&self) -> &rcc::$EN {
198+
// NOTE(unsafe) this proxy grants exclusive access to this register
199+
unsafe { &(*RCC::ptr()).$en }
200+
}
276201

277-
impl APB1R2 {
278-
// TODO remove `allow`
279-
#[allow(dead_code)]
280-
pub(crate) fn enr(&mut self) -> &rcc::APB1ENR2 {
281-
// NOTE(unsafe) this proxy grants exclusive access to this register
282-
unsafe { &(*RCC::ptr()).apb1enr2 }
283-
}
284-
// TODO remove `allow`
285-
#[allow(dead_code)]
286-
pub(crate) fn rstr(&mut self) -> &rcc::APB1RSTR2 {
287-
// NOTE(unsafe) this proxy grants exclusive access to this register
288-
unsafe { &(*RCC::ptr()).apb1rstr2 }
289-
}
290-
}
202+
pub(crate) fn smenr(&self) -> &rcc::$SMEN {
203+
// NOTE(unsafe) this proxy grants exclusive access to this register
204+
unsafe { &(*RCC::ptr()).$smen }
205+
}
291206

292-
/// Advanced Peripheral Bus 2 (APB2) registers
293-
pub struct APB2 {
294-
_0: (),
207+
pub(crate) fn rstr(&self) -> &rcc::$RST {
208+
// NOTE(unsafe) this proxy grants exclusive access to this register
209+
unsafe { &(*RCC::ptr()).$rst }
210+
}
211+
}
212+
)+
213+
};
295214
}
296215

297-
impl APB2 {
298-
pub(crate) fn enr(&mut self) -> &rcc::APB2ENR {
299-
// NOTE(unsafe) this proxy grants exclusive access to this register
300-
unsafe { &(*RCC::ptr()).apb2enr }
301-
}
302-
303-
pub(crate) fn rstr(&mut self) -> &rcc::APB2RSTR {
304-
// NOTE(unsafe) this proxy grants exclusive access to this register
305-
unsafe { &(*RCC::ptr()).apb2rstr }
306-
}
216+
bus_struct! {
217+
AHB1 => (AHB1ENR, ahb1enr, AHB1SMENR, ahb1smenr, AHB1RSTR, ahb1rstr, "Advanced High-performance Bus 1 (AHB1) registers"),
218+
AHB2 => (AHB2ENR, ahb2enr, AHB2SMENR, ahb2smenr, AHB2RSTR, ahb2rstr, "Advanced High-performance Bus 2 (AHB2) registers"),
219+
AHB3 => (AHB3ENR, ahb3enr, AHB3SMENR, ahb3smenr, AHB3RSTR, ahb3rstr, "Advanced High-performance Bus 3 (AHB3) registers"),
220+
APB1R1 => (APB1ENR1, apb1enr1, APB1SMENR1, apb1smenr1, APB1RSTR1, apb1rstr1, "Advanced Peripheral Bus 1 (APB1) registers"),
221+
APB1R2 => (APB1ENR2, apb1enr2, APB1SMENR2, apb1smenr2, APB1RSTR2, apb1rstr2, "Advanced Peripheral Bus 1 (APB1) registers"),
222+
APB2 => (APB2ENR, apb2enr, APB2SMENR, apb2smenr, APB2RSTR, apb2rstr, "Advanced Peripheral Bus 2 (APB2) registers"),
307223
}
308224

309225
#[derive(Debug, PartialEq)]

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