@@ -12,7 +12,6 @@ use crate::gpio::gpioa::{PA0, PA1, PA2, PA3};
1212use crate :: gpio:: { Alternate , Output , PushPull , AF1 } ;
1313use crate :: rcc:: { Clocks , /* AHB2, */ APB1R1 } ;
1414use crate :: time:: Hertz ;
15- // use crate::timer::PclkSrc;
1615
1716pub trait Pins < TIM > {
1817 const REMAP : u8 ;
@@ -23,6 +22,7 @@ pub trait Pins<TIM> {
2322 type Channels ;
2423}
2524
25+ /// NB: REMAP is not implemented!
2626impl Pins < TIM2 >
2727 for (
2828 PA0 < Alternate < AF1 , Output < PushPull > > > ,
@@ -39,6 +39,7 @@ impl Pins<TIM2>
3939 type Channels = ( Pwm < TIM2 , C1 > , Pwm < TIM2 , C2 > , Pwm < TIM2 , C3 > , Pwm < TIM2 , C4 > ) ;
4040}
4141
42+ // useful for RGB LED
4243impl Pins < TIM2 >
4344 for (
4445 PA1 < Alternate < AF1 , Output < PushPull > > > ,
@@ -89,7 +90,7 @@ impl PwmExt for TIM2 {
8990 T : Into < Hertz > ,
9091 {
9192 // TODO: check if this is really not needed (in the f1xx examples value
92- // of remap is 0x0. in which case , what's afio.mapr on l4xx?
93+ // of remap is 0x0). if so , what's afio.mapr on l4xx?
9394 //
9495 // mapr.mapr()
9596 // .modify(|_, w| unsafe { w.tim2_remap().bits(PINS::REMAP) });
@@ -123,6 +124,8 @@ macro_rules! hal {
123124 {
124125 apb. enr( ) . modify( |_, w| w. $timXen( ) . set_bit( ) ) ;
125126 apb. rstr( ) . modify( |_, w| w. $timXrst( ) . set_bit( ) ) ;
127+ // commented line is probably FUD
128+ // while apb.rstr().read().$timXrst().bit_is_clear() {}
126129 apb. rstr( ) . modify( |_, w| w. $timXrst( ) . clear_bit( ) ) ;
127130
128131 if PINS :: C1 {
@@ -144,33 +147,21 @@ macro_rules! hal {
144147 tim. ccmr2_output
145148 . modify( |_, w| unsafe { w. oc4pe( ) . set_bit( ) . oc4m( ) . bits( 6 ) } ) ;
146149 }
147- let clk = clocks. pclk1( ) . 0 ; //$TIMX::get_clk(&clocks).0;
150+ let clk = clocks. pclk1( ) . 0 ;
148151 let freq = freq. 0 ;
149- // let ticks = clk / freq;
150- let ticks = clk / freq; // TODO check pclk that timer is on
152+ let ticks = clk / freq;
151153
152154 let psc = u16 ( ticks / ( 1 << 16 ) ) . unwrap( ) ;
153155 tim. psc. write( |w| unsafe { w. psc( ) . bits( psc) } ) ;
154156 let arr = u16 ( ticks / u32 ( psc + 1 ) ) . unwrap( ) ;
155157 tim. arr. write( |w| { w. arr( ) . bits( u32 ( arr) ) } ) ;
156158
157- // let psc = u16((ticks - 1) / (1 << 16)).unwrap();
158-
159- // self.tim.psc.write(|w| unsafe { w.psc().bits(psc) });
160-
161- // let arr = u16(ticks / u32(psc + 1)).unwrap();
162-
163- // self.tim.arr.write(|w| unsafe { w.bits(u32(arr)) });
164-
165159 tim. cr1. write( |w| unsafe {
166160 w. cms( )
167161 . bits( 0b00 )
168- . dir( )
169- . clear_bit( )
170- . opm( )
171- . clear_bit( )
172- . cen( )
173- . set_bit( )
162+ . dir( ) . clear_bit( )
163+ . opm( ) . clear_bit( )
164+ . cen( ) . set_bit( )
174165 } ) ;
175166
176167 unsafe { mem:: uninitialized( ) }
@@ -188,17 +179,14 @@ macro_rules! hal {
188179 }
189180
190181 fn get_duty( & self ) -> u16 {
191- // unsafe { (*$TIMX::ptr()).ccr1.read().ccr().bits() }
192182 unsafe { u16 ( ( * $TIMX:: ptr( ) ) . ccr1. read( ) . ccr1( ) . bits( ) ) . unwrap( ) }
193183 }
194184
195185 fn get_max_duty( & self ) -> u16 {
196- // unsafe { (*$TIMX::ptr()).arr.read().arr().bits() }
197186 unsafe { u16 ( ( * $TIMX:: ptr( ) ) . arr. read( ) . arr( ) . bits( ) ) . unwrap( ) }
198187 }
199188
200189 fn set_duty( & mut self , duty: u16 ) {
201- // unsafe { (*$TIMX::ptr()).ccr1.write(|w| w.ccr().bits(duty)) }
202190 unsafe { ( * $TIMX:: ptr( ) ) . ccr1. write( |w| w. ccr1( ) . bits( u32 ( duty) ) ) }
203191 }
204192 }
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