@@ -17,24 +17,30 @@ pub enum Event {
1717pub trait SamplePin < TSC > { }
1818impl SamplePin < TSC > for PB4 < Alternate < AF9 , Output < OpenDrain > > > { }
1919
20- pub trait ChannelPins < TSC > { }
21- impl ChannelPins < TSC > for (
22- PB5 < Alternate < AF9 , Output < PushPull > > > ,
23- PB6 < Alternate < AF9 , Output < PushPull > > > ,
24- PB7 < Alternate < AF9 , Output < PushPull > > > )
25- { }
20+ pub trait ChannelPin < TSC > {
21+ const OFFSET : u32 ;
22+ }
23+ impl ChannelPin < TSC > for PB5 < Alternate < AF9 , Output < PushPull > > > {
24+ const OFFSET : u32 = 1 << 1 + ( 1 * 4 ) ;
25+ }
26+ impl ChannelPin < TSC > for PB6 < Alternate < AF9 , Output < PushPull > > > {
27+ const OFFSET : u32 = 1 << 2 + ( 1 * 4 ) ;
28+ }
29+ impl ChannelPin < TSC > for PB7 < Alternate < AF9 , Output < PushPull > > > {
30+ const OFFSET : u32 = 1 << 3 + ( 1 * 4 ) ;
31+ }
32+
2633
2734// TODO currently requires all the pins even if a user wants one channel, fix
28- pub struct Tsc < SPIN , PINS > {
35+ pub struct Tsc < SPIN > {
2936 sample_pin : SPIN ,
30- pins : PINS ,
37+ // pins: PINS,
3138 tsc : TSC
3239}
3340
34- impl < SPIN , PINS > Tsc < SPIN , PINS > {
35- pub fn tsc ( tsc : TSC , sample_pin : SPIN , pins : PINS , ahb : & mut AHB1 ) -> Self
36- where PINS : ChannelPins < TSC > ,
37- SPIN : SamplePin < TSC >
41+ impl < SPIN > Tsc < SPIN > {
42+ pub fn tsc ( tsc : TSC , sample_pin : SPIN , ahb : & mut AHB1 ) -> Self
43+ where SPIN : SamplePin < TSC > // PINS: ChannelPins<TSC>,
3844 {
3945 /* Enable the peripheral clock */
4046 ahb. enr ( ) . modify ( |_, w| w. tscen ( ) . set_bit ( ) ) ;
@@ -75,13 +81,6 @@ impl<SPIN, PINS> Tsc<SPIN, PINS> {
7581
7682 // Set the sampling pin
7783 tsc. ioscr . write ( |w| { w. g2_io1 ( ) . set_bit ( ) } ) ;
78-
79- // Set the channel pin(s)
80- tsc. ioccr . write ( |w| {
81- w. g2_io2 ( ) . set_bit ( )
82- . g2_io3 ( ) . set_bit ( )
83- . g2_io4 ( ) . set_bit ( )
84- } ) ;
8584
8685 // set the acquisitiuon groups based of the channel pins, stm32l432xx only has group 2
8786 tsc. iogcsr . write ( |w| { w. g2e ( ) . set_bit ( ) } ) ;
@@ -95,12 +94,14 @@ impl<SPIN, PINS> Tsc<SPIN, PINS> {
9594 Tsc {
9695 tsc : tsc,
9796 sample_pin : sample_pin,
98- pins : pins,
97+ // pins: pins,
9998 }
10099 }
101100
102101 /// Starts a charge acquisition
103- pub fn start ( & self ) {
102+ pub fn start < PIN > ( & self , _input : & mut PIN )
103+ where PIN : ChannelPin < TSC >
104+ {
104105 // clear interrupt & flags
105106 self . tsc . icr . write ( |w| {
106107 w. eoaic ( ) . set_bit ( )
@@ -112,6 +113,11 @@ impl<SPIN, PINS> Tsc<SPIN, PINS> {
112113 w. iodef ( ) . clear_bit ( )
113114 } ) ;
114115
116+ // Set the channel pin
117+ self . tsc . ioccr . write ( |w| unsafe {
118+ w. bits ( PIN :: OFFSET )
119+ } ) ;
120+
115121 self . tsc . cr . modify ( |_, w| { w. start ( ) . set_bit ( ) } ) ;
116122 }
117123
@@ -152,7 +158,7 @@ impl<SPIN, PINS> Tsc<SPIN, PINS> {
152158 }
153159
154160 /// Releases the TSC peripheral and associated pins
155- pub fn free ( self ) -> ( TSC , SPIN , PINS ) {
156- ( self . tsc , self . sample_pin , self . pins )
161+ pub fn free ( self ) -> ( TSC , SPIN ) {
162+ ( self . tsc , self . sample_pin )
157163 }
158164}
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