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Converted start into acquire which starts the tsc acquisition and blocks until it is complete
1 parent 67df935 commit 96d63d1

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2 files changed

+54
-28
lines changed

2 files changed

+54
-28
lines changed

examples/touch.rs

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -46,14 +46,12 @@ fn main() -> ! {
4646
// , (c1, c2, c3)
4747
let tsc = Tsc::tsc(p.TSC, sample_pin, &mut rcc.ahb1);
4848

49-
tsc.start(&mut c1);
50-
let baseline = tsc.wait().unwrap();
49+
let baseline = tsc.acquire(&mut c1).unwrap();
5150
let threshold = (baseline / 100) * 60;
51+
5252
loop {
53-
tsc.start(&mut c1);
54-
let touched = tsc.wait().unwrap();
55-
tsc.start(&mut c2);
56-
let _touched_c2 = tsc.wait().unwrap();
53+
let touched = tsc.acquire(&mut c1).unwrap();
54+
let _touched_c2 = tsc.acquire(&mut c2).unwrap();
5755
if touched < threshold {
5856
led.set_high();
5957
} else {

src/tsc.rs

Lines changed: 50 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -15,35 +15,45 @@ pub enum Event {
1515

1616
// TODO macro to impl all possible channel/sample pin combinations
1717
pub trait SamplePin<TSC> {
18+
const GROUP: u32;
1819
const OFFSET: u32;
1920
}
2021
impl SamplePin<TSC> for PB4<Alternate<AF9, Output<OpenDrain>>> {
21-
const OFFSET: u32 = 1 << 0 + (1 * 4);
22+
const GROUP: u32 = 2;
23+
const OFFSET: u32 = 0;
2224
}
2325
impl SamplePin<TSC> for PB5<Alternate<AF9, Output<OpenDrain>>> {
24-
const OFFSET: u32 = 1 << 1 + (1 * 4);
26+
const GROUP: u32 = 2;
27+
const OFFSET: u32 = 1;
2528
}
2629
impl SamplePin<TSC> for PB6<Alternate<AF9, Output<OpenDrain>>> {
27-
const OFFSET: u32 = 1 << 2 + (1 * 4);
30+
const GROUP: u32 = 2;
31+
const OFFSET: u32 = 2;
2832
}
2933
impl SamplePin<TSC> for PB7<Alternate<AF9, Output<OpenDrain>>> {
30-
const OFFSET: u32 = 1 << 3 + (1 * 4);
34+
const GROUP: u32 = 2;
35+
const OFFSET: u32 = 3;
3136
}
3237

3338
pub trait ChannelPin<TSC> {
39+
const GROUP: u32;
3440
const OFFSET: u32;
3541
}
3642
impl ChannelPin<TSC> for PB4<Alternate<AF9, Output<PushPull>>> {
37-
const OFFSET: u32 = 1 << 0 + (1 * 4);
43+
const GROUP: u32 = 2;
44+
const OFFSET: u32 = 0;
3845
}
3946
impl ChannelPin<TSC> for PB5<Alternate<AF9, Output<PushPull>>> {
40-
const OFFSET: u32 = 1 << 1 + (1 * 4);
47+
const GROUP: u32 = 2;
48+
const OFFSET: u32 = 1;
4149
}
4250
impl ChannelPin<TSC> for PB6<Alternate<AF9, Output<PushPull>>> {
43-
const OFFSET: u32 = 1 << 2 + (1 * 4);
51+
const GROUP: u32 = 2;
52+
const OFFSET: u32 = 2;
4453
}
4554
impl ChannelPin<TSC> for PB7<Alternate<AF9, Output<PushPull>>> {
46-
const OFFSET: u32 = 1 << 3 + (1 * 4);
55+
const GROUP: u32 = 2;
56+
const OFFSET: u32 = 3;
4757
}
4858

4959

@@ -87,16 +97,15 @@ impl<SPIN> Tsc<SPIN> {
8797

8898
// TODO allow configuration
8999

90-
// Schmitt trigger hysteresis on all used TSC IOs
91-
tsc.iohcr.write(|w| {
92-
w.g2_io1().set_bit()
93-
.g2_io2().set_bit()
94-
.g2_io3().set_bit()
95-
.g2_io4().set_bit()
100+
let bit_pos = SPIN::OFFSET + (4 * (SPIN::GROUP - 1));
101+
102+
// Schmitt trigger hysteresis on sample IOs
103+
tsc.iohcr.write(|w| unsafe {
104+
w.bits(1 << bit_pos)
96105
});
97106

98107
// Set the sampling pin
99-
tsc.ioscr.write(|w| { w.g2_io1().set_bit() });
108+
tsc.ioscr.write(|w| unsafe { w.bits(1 << bit_pos) });
100109

101110
// set the acquisitiuon groups based of the channel pins, stm32l432xx only has group 2
102111
tsc.iogcsr.write(|w| { w.g2e().set_bit() });
@@ -110,7 +119,6 @@ impl<SPIN> Tsc<SPIN> {
110119
Tsc {
111120
tsc: tsc,
112121
sample_pin: sample_pin,
113-
// pins: pins,
114122
}
115123
}
116124

@@ -129,24 +137,44 @@ impl<SPIN> Tsc<SPIN> {
129137
w.iodef().clear_bit()
130138
});
131139

140+
let bit_pos = PIN::OFFSET + (4 * (PIN::GROUP - 1));
141+
132142
// Set the channel pin
133143
self.tsc.ioccr.write(|w| unsafe {
134-
w.bits(PIN::OFFSET)
144+
w.bits(1 << bit_pos)
135145
});
136146

137147
self.tsc.cr.modify(|_, w| { w.start().set_bit() });
138148
}
139149

140150
/// Blocks waiting for a acquisition to complete or for a Max Count Error
141-
pub fn wait(&self) -> Result<u16, Event> {
142-
loop {
151+
pub fn acquire<PIN>(&self, input: &mut PIN) -> Result<u16, Event>
152+
where PIN: ChannelPin<TSC>
153+
{
154+
let bit_pos = PIN::OFFSET + (4 * (PIN::GROUP - 1));
155+
156+
// disable Schmitt trigger hysteresis
157+
self.tsc.iohcr.write(|w| unsafe {
158+
w.bits(1 << bit_pos)
159+
});
160+
161+
self.start(input);
162+
163+
let result = loop {
143164
let isr = self.tsc.isr.read();
144165
if isr.eoaf().bit_is_set() {
145-
break Ok(self.tsc.iog2cr.read().cnt().bits());
166+
break Ok(self.tsc.iog2cr.read().cnt().bits())
146167
} else if isr.mcef().bit_is_set() {
147-
break Err(Event::MaxCountError);
168+
break Err(Event::MaxCountError)
148169
}
149-
}
170+
};
171+
172+
// re-enable Schmitt trigger hysteresis
173+
self.tsc.iohcr.write(|w| unsafe {
174+
w.bits(0 << bit_pos)
175+
});
176+
177+
result
150178
}
151179

152180
/// Enables an interrupt event

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