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hannobraunhannobraun
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Further simplify use statements in serial 
1 parent 45cc12a commit ccf4ce9

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+34
-49
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1 file changed

+34
-49
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‎src/serial.rs‎

Lines changed: 34 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -14,24 +14,9 @@ use stable_deref_trait::StableDeref;
1414

1515
use crate::hal::serial::{self, Write};
1616

17-
use crate::stm32::{USART1, USART2};
18-
19-
#[cfg(any(
20-
feature = "stm32l4x2",
21-
feature = "stm32l4x3",
22-
feature = "stm32l4x5",
23-
feature = "stm32l4x6",
24-
))]
25-
use crate::stm32::USART3;
26-
27-
#[cfg(any(feature = "stm32l4x5", feature = "stm32l4x6",))]
28-
use crate::stm32::UART4;
29-
30-
#[cfg(any(feature = "stm32l4x5", feature = "stm32l4x6",))]
31-
use crate::stm32::UART5;
32-
3317
use crate::dma::{dma1, CircBuffer, DMAFrame, FrameReader, FrameSender};
3418
use crate::gpio::{self, Alternate, Floating, Input};
19+
use crate::pac;
3520
use crate::rcc::{Clocks, APB1R1, APB2};
3621
use crate::time::{Bps, U32Ext};
3722

@@ -203,7 +188,7 @@ macro_rules! hal {
203188
),
204189
)+) => {
205190
$(
206-
impl<PINS> Serial<$USARTX, PINS> {
191+
impl<PINS> Serial<pac::$USARTX, PINS> {
207192
/// Configures the serial interface and creates the interface
208193
/// struct.
209194
///
@@ -220,14 +205,14 @@ macro_rules! hal {
220205
/// configuration. (`MAPR` is used to map the USART to the
221206
/// corresponding pins. `APBX` is used to reset the USART.)
222207
pub fn $usartX(
223-
usart: $USARTX,
208+
usart: pac::$USARTX,
224209
pins: PINS,
225210
config: Config,
226211
clocks: Clocks,
227212
apb: &mut $APB,
228213
) -> Self
229214
where
230-
PINS: Pins<$USARTX>,
215+
PINS: Pins<pac::$USARTX>,
231216
{
232217
// enable or reset $USARTX
233218
apb.enr().modify(|_, w| w.$usartXen().set_bit());
@@ -374,7 +359,7 @@ macro_rules! hal {
374359
}
375360

376361
/// Splits the `Serial` abstraction into a transmitter and a receiver half
377-
pub fn split(self) -> (Tx<$USARTX>, Rx<$USARTX>) {
362+
pub fn split(self) -> (Tx<pac::$USARTX>, Rx<pac::$USARTX>) {
378363
(
379364
Tx {
380365
_usart: PhantomData,
@@ -386,31 +371,31 @@ macro_rules! hal {
386371
}
387372

388373
/// Frees the USART peripheral
389-
pub fn release(self) -> ($USARTX, PINS) {
374+
pub fn release(self) -> (pac::$USARTX, PINS) {
390375
(self.usart, self.pins)
391376
}
392377
}
393378

394-
impl<PINS> serial::Read<u8> for Serial<$USARTX, PINS> {
379+
impl<PINS> serial::Read<u8> for Serial<pac::$USARTX, PINS> {
395380
type Error = Error;
396381

397382
fn read(&mut self) -> nb::Result<u8, Error> {
398-
let mut rx: Rx<$USARTX> = Rx {
383+
let mut rx: Rx<pac::$USARTX> = Rx {
399384
_usart: PhantomData,
400385
};
401386
rx.read()
402387
}
403388
}
404389

405-
impl serial::Read<u8> for Rx<$USARTX> {
390+
impl serial::Read<u8> for Rx<pac::$USARTX> {
406391
type Error = Error;
407392

408393
fn read(&mut self) -> nb::Result<u8, Error> {
409394
// NOTE(unsafe) atomic read with no side effects
410-
let isr = unsafe { (*$USARTX::ptr()).isr.read() };
395+
let isr = unsafe { (*pac::$USARTX::ptr()).isr.read() };
411396

412397
// NOTE(unsafe): Only used for atomic writes, to clear error flags.
413-
let icr = unsafe { &(*$USARTX::ptr()).icr };
398+
let icr = unsafe { &(*pac::$USARTX::ptr()).icr };
414399

415400
Err(if isr.pe().bit_is_set() {
416401
icr.write(|w| w.pecf().clear());
@@ -427,33 +412,33 @@ macro_rules! hal {
427412
} else if isr.rxne().bit_is_set() {
428413
// NOTE(read_volatile) see `write_volatile` below
429414
return Ok(unsafe {
430-
ptr::read_volatile(&(*$USARTX::ptr()).rdr as *const _ as *const _)
415+
ptr::read_volatile(&(*pac::$USARTX::ptr()).rdr as *const _ as *const _)
431416
});
432417
} else {
433418
nb::Error::WouldBlock
434419
})
435420
}
436421
}
437422

438-
impl<PINS> serial::Write<u8> for Serial<$USARTX, PINS> {
423+
impl<PINS> serial::Write<u8> for Serial<pac::$USARTX, PINS> {
439424
type Error = Error;
440425

441426
fn flush(&mut self) -> nb::Result<(), Error> {
442-
let mut tx: Tx<$USARTX> = Tx {
427+
let mut tx: Tx<pac::$USARTX> = Tx {
443428
_usart: PhantomData,
444429
};
445430
tx.flush()
446431
}
447432

448433
fn write(&mut self, byte: u8) -> nb::Result<(), Error> {
449-
let mut tx: Tx<$USARTX> = Tx {
434+
let mut tx: Tx<pac::$USARTX> = Tx {
450435
_usart: PhantomData,
451436
};
452437
tx.write(byte)
453438
}
454439
}
455440

456-
impl serial::Write<u8> for Tx<$USARTX> {
441+
impl serial::Write<u8> for Tx<pac::$USARTX> {
457442
// NOTE(Void) See section "29.7 USART interrupts"; the only possible errors during
458443
// transmission are: clear to send (which is disabled in this case) errors and
459444
// framing errors (which only occur in SmartCard mode); neither of these apply to
@@ -462,7 +447,7 @@ macro_rules! hal {
462447

463448
fn flush(&mut self) -> nb::Result<(), Error> {
464449
// NOTE(unsafe) atomic read with no side effects
465-
let isr = unsafe { (*$USARTX::ptr()).isr.read() };
450+
let isr = unsafe { (*pac::$USARTX::ptr()).isr.read() };
466451

467452
if isr.tc().bit_is_set() {
468453
Ok(())
@@ -473,13 +458,13 @@ macro_rules! hal {
473458

474459
fn write(&mut self, byte: u8) -> nb::Result<(), Error> {
475460
// NOTE(unsafe) atomic read with no side effects
476-
let isr = unsafe { (*$USARTX::ptr()).isr.read() };
461+
let isr = unsafe { (*pac::$USARTX::ptr()).isr.read() };
477462

478463
if isr.txe().bit_is_set() {
479464
// NOTE(unsafe) atomic write to stateless register
480465
// NOTE(write_volatile) 8-bit write that's not possible through the svd2rust API
481466
unsafe {
482-
ptr::write_volatile(&(*$USARTX::ptr()).tdr as *const _ as *mut _, byte)
467+
ptr::write_volatile(&(*pac::$USARTX::ptr()).tdr as *const _ as *mut _, byte)
483468
}
484469
Ok(())
485470
} else {
@@ -488,7 +473,7 @@ macro_rules! hal {
488473
}
489474
}
490475

491-
impl Rx<$USARTX> {
476+
impl Rx<pac::$USARTX> {
492477
pub fn circ_read<B, H>(
493478
&self,
494479
mut chan: $rx_chan,
@@ -499,7 +484,7 @@ macro_rules! hal {
499484
H: AsMutSlice<Element = u8>
500485
{
501486
let buf = buffer[0].as_mut_slice();
502-
chan.set_peripheral_address(unsafe{ &(*$USARTX::ptr()).rdr as *const _ as u32 }, false);
487+
chan.set_peripheral_address(unsafe{ &(*pac::$USARTX::ptr()).rdr as *const _ as u32 }, false);
503488
chan.set_memory_address(buf.as_ptr() as u32, true);
504489
chan.set_transfer_length((buf.len() * 2) as u16);
505490

@@ -546,7 +531,7 @@ macro_rules! hal {
546531
BUFFER: Sized + StableDeref<Target = DMAFrame<N>> + DerefMut + 'static,
547532
N: ArrayLength<MaybeUninit<u8>>,
548533
{
549-
let usart = unsafe{ &(*$USARTX::ptr()) };
534+
let usart = unsafe{ &(*pac::$USARTX::ptr()) };
550535

551536
// Setup DMA transfer
552537
let buf = &*buffer;
@@ -588,8 +573,8 @@ macro_rules! hal {
588573
/// Checks to see if the USART peripheral has detected an idle line and clears
589574
/// the flag
590575
pub fn is_idle(&mut self, clear: bool) -> bool {
591-
let isr = unsafe { &(*$USARTX::ptr()).isr.read() };
592-
let icr = unsafe { &(*$USARTX::ptr()).icr };
576+
let isr = unsafe { &(*pac::$USARTX::ptr()).isr.read() };
577+
let icr = unsafe { &(*pac::$USARTX::ptr()).icr };
593578

594579
if isr.idle().bit_is_set() {
595580
if clear {
@@ -604,8 +589,8 @@ macro_rules! hal {
604589
/// Checks to see if the USART peripheral has detected an character match and
605590
/// clears the flag
606591
pub fn is_character_match(&mut self, clear: bool) -> bool {
607-
let isr = unsafe { &(*$USARTX::ptr()).isr.read() };
608-
let icr = unsafe { &(*$USARTX::ptr()).icr };
592+
let isr = unsafe { &(*pac::$USARTX::ptr()).isr.read() };
593+
let icr = unsafe { &(*pac::$USARTX::ptr()).icr };
609594

610595
if isr.cmf().bit_is_set() {
611596
if clear {
@@ -620,8 +605,8 @@ macro_rules! hal {
620605
/// Checks to see if the USART peripheral has detected an receiver timeout and
621606
/// clears the flag
622607
pub fn is_receiver_timeout(&mut self, clear: bool) -> bool {
623-
let isr = unsafe { &(*$USARTX::ptr()).isr.read() };
624-
let icr = unsafe { &(*$USARTX::ptr()).icr };
608+
let isr = unsafe { &(*pac::$USARTX::ptr()).isr.read() };
609+
let icr = unsafe { &(*pac::$USARTX::ptr()).icr };
625610

626611
if isr.rtof().bit_is_set() {
627612
if clear {
@@ -634,7 +619,7 @@ macro_rules! hal {
634619
}
635620
}
636621

637-
impl Tx<$USARTX> {
622+
impl Tx<pac::$USARTX> {
638623
/// Creates a new DMA frame sender
639624
pub fn frame_sender<BUFFER, N>(
640625
&self,
@@ -644,7 +629,7 @@ macro_rules! hal {
644629
BUFFER: Sized + StableDeref<Target = DMAFrame<N>> + DerefMut + 'static,
645630
N: ArrayLength<MaybeUninit<u8>>,
646631
{
647-
let usart = unsafe{ &(*$USARTX::ptr()) };
632+
let usart = unsafe{ &(*pac::$USARTX::ptr()) };
648633

649634
// Setup DMA
650635
channel.set_peripheral_address(&usart.tdr as *const _ as u32, false);
@@ -763,28 +748,28 @@ macro_rules! impl_pin_traits {
763748
$(
764749
impl private::SealedTx for
765750
gpio::$tx<Alternate<gpio::$af, Input<Floating>>> {}
766-
impl TxPin<$instance> for
751+
impl TxPin<pac::$instance> for
767752
gpio::$tx<Alternate<gpio::$af, Input<Floating>>> {}
768753
)*
769754

770755
$(
771756
impl private::SealedRx for
772757
gpio::$rx<Alternate<gpio::$af, Input<Floating>>> {}
773-
impl RxPin<$instance> for
758+
impl RxPin<pac::$instance> for
774759
gpio::$rx<Alternate<gpio::$af, Input<Floating>>> {}
775760
)*
776761

777762
$(
778763
impl private::SealedRtsDe for
779764
gpio::$rts_de<Alternate<gpio::$af, Input<Floating>>> {}
780-
impl RtsDePin<$instance> for
765+
impl RtsDePin<pac::$instance> for
781766
gpio::$rts_de<Alternate<gpio::$af, Input<Floating>>> {}
782767
)*
783768

784769
$(
785770
impl private::SealedCts for
786771
gpio::$cts<Alternate<gpio::$af, Input<Floating>>> {}
787-
impl CtsPin<$instance> for
772+
impl CtsPin<pac::$instance> for
788773
gpio::$cts<Alternate<gpio::$af, Input<Floating>>> {}
789774
)*
790775
)*

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