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Fmt and clippy fixes
Fixed clippy workflow More fixes RTIC example only works on some targets, remove for now Added target to clippy Added back RTIC example with Cargo.toml exclusion based on feature
1 parent 8c80a20 commit d51a8be

29 files changed

+113
-142
lines changed

.github/workflows/ci.yml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,8 @@ jobs:
3131
with:
3232
use-cross: true
3333
command: build
34-
args: --verbose --release --examples --target thumbv7em-none-eabihf --features rt,${{ matrix.mcu }}
34+
args: --verbose --release --examples --target thumbv7em-none-eabihf --features rt,unproven,${{ matrix.mcu }}
3535
- uses: actions-rs/cargo@v1
3636
with:
3737
command: test
38-
args: --lib --target x86_64-unknown-linux-gnu --features rt,${{ matrix.mcu }}
38+
args: --lib --target x86_64-unknown-linux-gnu --features rt,unproven,${{ matrix.mcu }}

.github/workflows/clippy.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,4 +19,4 @@ jobs:
1919
- uses: actions-rs/clippy-check@v1
2020
with:
2121
token: ${{ secrets.GITHUB_TOKEN }}
22-
args: --examples --features=stm32l4x5,rt
22+
args: --examples --target thumbv7em-none-eabihf --features=stm32l4x2,rt,unproven

Cargo.toml

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ cortex-m-rt = "0.6.12"
6868
usb-device = "0.2.3"
6969
usbd-serial = "0.1.0"
7070
heapless = "0.5"
71-
cortex-m-rtfm = "0.5"
71+
cortex-m-rtic = "0.5.5"
7272

7373
[profile.dev]
7474
incremental = false
@@ -86,3 +86,9 @@ required-features = ["rt", "stm32l4x2", "stm32-usbd"]
8686
[[example]]
8787
name = "qspi"
8888
required-features = ["rt", "stm32l4x5"]
89+
90+
91+
[[example]]
92+
name = "rtic_frame_serial_dma"
93+
required-features = ["rt", "stm32l4x2"]
94+

examples/blinky.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,10 +54,10 @@ fn main() -> ! {
5454
loop {
5555
// block!(timer.wait()).unwrap();
5656
timer.delay_ms(1000 as u32);
57-
led.set_high();
57+
led.set_high().ok();
5858
// block!(timer.wait()).unwrap();
5959
timer.delay_ms(1000 as u32);
60-
led.set_low();
60+
led.set_low().ok();
6161
}
6262
}
6363

examples/i2c_write.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -60,17 +60,17 @@ fn main() -> ! {
6060
const MAX17048_ADDR: u8 = 0x6C;
6161
i2c.write_read(MAX17048_ADDR, &[0x08], &mut buffer).unwrap();
6262
let version: u16 = (buffer[0] as u16) << 8 | buffer[1] as u16;
63-
writeln!(hstdout, "Silicon Version: {}", version);
63+
writeln!(hstdout, "Silicon Version: {}", version).ok();
6464

6565
// let soc: u16 = (buffer[0] as u16) + (buffer[1] as u16 / 256); //& 0xFF00
6666
// let soc: u16 = (buffer[0] as u16) << 8 & 0xFF00 | (buffer[1] as u16) & 0x00FF;
6767
i2c.write_read(MAX17048_ADDR, &[0x04], &mut buffer).unwrap();
6868
let soc: u16 = (buffer[0] as u16) << 8 | buffer[1] as u16;
69-
writeln!(hstdout, "Batt SoC: {}%", soc / 256);
69+
writeln!(hstdout, "Batt SoC: {}%", soc / 256).ok();
7070

7171
i2c.write_read(MAX17048_ADDR, &[0x02], &mut buffer).unwrap();
7272
let vlt: u16 = (buffer[0] as u16) << 8 | buffer[1] as u16;
73-
writeln!(hstdout, "Volt: {}", vlt as f32 * 0.000078125);
73+
writeln!(hstdout, "Volt: {}", vlt as f32 * 0.000078125).ok();
7474

7575
loop {}
7676
}

examples/irq_button.rs

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -12,12 +12,12 @@ use crate::hal::{
1212
prelude::*,
1313
stm32,
1414
};
15+
use core::cell::RefCell;
16+
use core::ops::DerefMut;
1517
use cortex_m::{
1618
interrupt::{free, Mutex},
17-
peripheral::NVIC
19+
peripheral::NVIC,
1820
};
19-
use core::cell::RefCell;
20-
use core::ops::DerefMut;
2121
use rt::entry;
2222

2323
// Set up global state. It's all mutexed up for concurrency safety.
@@ -44,12 +44,14 @@ fn main() -> ! {
4444
let mut board_btn = gpioc
4545
.pc13
4646
.into_pull_up_input(&mut gpioc.moder, &mut gpioc.pupdr);
47-
board_btn.make_interrupt_source(&mut dp.SYSCFG);
47+
board_btn.make_interrupt_source(&mut dp.SYSCFG, &mut rcc.apb2);
4848
board_btn.enable_interrupt(&mut dp.EXTI);
4949
board_btn.trigger_on_edge(&mut dp.EXTI, Edge::FALLING);
5050

5151
// Enable interrupts
52-
unsafe { NVIC::unmask(stm32::Interrupt::EXTI15_10); }
52+
unsafe {
53+
NVIC::unmask(stm32::Interrupt::EXTI15_10);
54+
}
5355

5456
free(|cs| {
5557
BUTTON.borrow(cs).replace(Some(board_btn));

examples/pll_config.rs

Lines changed: 3 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,6 @@ extern crate stm32l4xx_hal as hal;
1818
// extern crate nb;
1919

2020
use crate::hal::prelude::*;
21-
use crate::hal::rcc::{PllConfig, PllDivider};
2221
use crate::hal::serial::{Config, Serial};
2322
use crate::rt::ExceptionFrame;
2423
use cortex_m::asm;
@@ -31,24 +30,16 @@ fn main() -> ! {
3130
let mut rcc = p.RCC.constrain();
3231
let mut pwr = p.PWR.constrain(&mut rcc.apb1r1);
3332
let mut gpioa = p.GPIOA.split(&mut rcc.ahb2);
34-
let mut pwr = p.PWR.constrain(&mut rcc.apb1r1);
3533
// let mut gpiob = p.GPIOB.split(&mut rcc.ahb2);
3634

3735
// clock configuration using the default settings (all clocks run at 8 MHz)
3836
// let clocks = rcc.cfgr.freeze(&mut flash.acr);
3937
// TRY this alternate clock configuration (clocks run at nearly the maximum frequency)
40-
// let clocks = rcc.cfgr.sysclk(80.mhz()).pclk1(80.mhz()).pclk2(80.mhz()).freeze(&mut flash.acr);
41-
let plls = PllConfig {
42-
m: 0b001, // / 2
43-
n: 0b1000, // * 8
44-
r: PllDivider::Div8, // /8
45-
};
46-
// NOTE: it is up to the user to make sure the pll config matches the given sysclk
4738
let clocks = rcc
4839
.cfgr
49-
.sysclk_with_pll(8.mhz(), plls)
50-
.pclk1(8.mhz())
51-
.pclk2(8.mhz())
40+
.sysclk(80.mhz())
41+
.pclk1(80.mhz())
42+
.pclk2(80.mhz())
5243
.freeze(&mut flash.acr, &mut pwr);
5344

5445
// The Serial API is highly generic

examples/qspi.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ fn main() -> ! {
3232
let mut pwr = p.PWR.constrain(&mut rcc.apb1r1);
3333

3434
// clock configuration (clocks run at nearly the maximum frequency)
35-
let clocks = rcc
35+
let _clocks = rcc
3636
.cfgr
3737
.sysclk(80.mhz())
3838
.pclk1(80.mhz())

examples/rng.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ use crate::hal::delay::Delay;
1111
use crate::hal::prelude::*;
1212
use crate::hal::serial::{Config, Serial};
1313
use crate::hal::stm32;
14+
use hal::hal::blocking::rng::Read;
1415

1516
macro_rules! uprint {
1617
($serial:expr, $($arg:tt)*) => {

examples/rtc.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ extern crate stm32l4xx_hal as hal;
1717
use crate::hal::datetime::{Date, Time};
1818
use crate::hal::delay::Delay;
1919
use crate::hal::prelude::*;
20-
use crate::hal::rcc::{CrystalBypass, ClockSecuritySystem};
20+
use crate::hal::rcc::{ClockSecuritySystem, CrystalBypass};
2121
use crate::hal::rtc::{Rtc, RtcClockSource, RtcConfig};
2222
use crate::rt::ExceptionFrame;
2323

@@ -50,7 +50,7 @@ fn main() -> ! {
5050
&mut rcc.apb1r1,
5151
&mut rcc.bdcr,
5252
&mut pwr.cr1,
53-
RtcConfig::default().clock_config(RtcClockSource::LSE)
53+
RtcConfig::default().clock_config(RtcClockSource::LSE),
5454
);
5555

5656
let time = Time::new(21.hours(), 57.minutes(), 32.seconds(), 0.micros(), false);

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