Fixed tsc aquire, bump minor vers

Author: MabezDev

CHANGELOG.md

@@ -5,6 +5,10 @@ This project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+## [v0.2.5] - 2018-11-03
+
+## Fixed TSC flags not getting cleared by the `aquire` tsc method.
+
 ## [v0.2.4] - 2018-10-32
 
 ### Fixed
@@ -54,7 +58,8 @@ This project adheres to [Semantic Versioning](http://semver.org/).
 
 - Initial release
 
-[Unreleased]: https://github.com/mabezdev/stm32l432xx-hal/compare/v0.2.4...HEAD
+[Unreleased]: https://github.com/mabezdev/stm32l432xx-hal/compare/v0.2.5...HEAD
+[v0.2.4]: https://github.com/mabezdev/stm32l432xx-hal/compare/v0.2.4...v0.2.5
 [v0.2.4]: https://github.com/mabezdev/stm32l432xx-hal/compare/v0.2.3...v0.2.4
 [v0.2.3]: https://github.com/mabezdev/stm32l432xx-hal/compare/v0.2.2...v0.2.3
 [v0.2.2]: https://github.com/mabezdev/stm32l432xx-hal/compare/v0.2.1...v0.2.2

Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "stm32l432xx-hal"
-version = "0.2.4"
+version = "0.2.5"
 authors = ["Scott Mabin <[email protected]>"]
 description = "Hardware abstraction layer for the stm32l432xx chips"
 keywords = ["no-std", "stm32l432xx", "stm32l432kc", "embedded", "embedded-hal"]

src/tsc.rs

@@ -201,8 +201,10 @@ impl<SPIN> Tsc<SPIN> {
         let result = loop {
             let isr = self.tsc.isr.read();
             if isr.eoaf().bit_is_set() {
+                self.tsc.icr.write(|w| { w.eoaic().clear_bit() });
                 break Ok(self.read_unchecked())
             } else if isr.mcef().bit_is_set() {
+                self.tsc.icr.write(|w| { w.mceic().clear_bit() });
                 break Err(Error::MaxCountError)
             }
         };