@@ -232,7 +232,7 @@ impl_consts!(Uart1, 17, 18, UART1_BASE);
232
232
impl_consts ! ( Uart2 , 19 , 20 , UART2_BASE ) ;
233
233
234
234
macro_rules! impl_clock_hz {
235
- ( $uart: ident, $sel: ident, $presc: ident, $method: ident) => {
235
+ ( $uart: ident, $sel: ident, $presc: ident, $method: ident, $pclk_method : ident ) => {
236
236
impl <RX , TX > $uart<RX , TX > {
237
237
/// Calculate the clock frequency.
238
238
///
@@ -242,7 +242,7 @@ macro_rules! impl_clock_hz {
242
242
let src: Ratio <u32 > = match rcc. ccipr. read( ) . $method( ) . variant( ) {
243
243
$sel:: PCLK => {
244
244
let cfgr: pac:: rcc:: cfgr:: R = rcc. cfgr. read( ) ;
245
- rcc:: hclk3 ( rcc, & cfgr)
245
+ rcc:: $pclk_method ( rcc, & cfgr)
246
246
}
247
247
$sel:: SYSCLK => {
248
248
let cfgr: pac:: rcc:: cfgr:: R = rcc. cfgr. read( ) ;
@@ -274,9 +274,9 @@ macro_rules! impl_clock_hz {
274
274
} ;
275
275
}
276
276
277
- impl_clock_hz ! ( LpUart , LPUART1SEL_A , lpuart, lpuart1sel) ;
278
- impl_clock_hz ! ( Uart1 , USART1SEL_A , usart1, usart1sel) ;
279
- impl_clock_hz ! ( Uart2 , USART1SEL_A , usart1, usart2sel) ;
277
+ impl_clock_hz ! ( LpUart , LPUART1SEL_A , lpuart, lpuart1sel, pclk1 ) ;
278
+ impl_clock_hz ! ( Uart1 , USART1SEL_A , usart1, usart1sel, pclk2 ) ;
279
+ impl_clock_hz ! ( Uart2 , USART1SEL_A , usart1, usart2sel, pclk1 ) ;
280
280
281
281
macro_rules! impl_pulse_reset {
282
282
( $uart: ident, $reg: ident, $method: ident) => {
0 commit comments