Skip to content

Commit 03d6d5a

Browse files
fpistmfpistm
committed
[WB] Update STM32WBxx HAL Drivers to v1.1.0
Included in STM32CubeWB FW V1.1.0 Signed-off-by: Frederic.Pillon <[email protected]>
1 parent 2890707 commit 03d6d5a

35 files changed

+1068
-862
lines changed

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 91 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -236,6 +236,15 @@
236236
#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
237237
#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
238238

239+
#if defined(STM32G4)
240+
#define DAC_CHIPCONNECT_DISABLE (DAC_CHIPCONNECT_EXTERNAL | DAC_CHIPCONNECT_BOTH)
241+
#define DAC_CHIPCONNECT_ENABLE (DAC_CHIPCONNECT_INTERNAL | DAC_CHIPCONNECT_BOTH)
242+
#endif
243+
244+
#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0)
245+
#define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID
246+
#define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID
247+
#endif
239248

240249
/**
241250
* @}
@@ -487,6 +496,13 @@
487496
#define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
488497
#define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
489498
#define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
499+
#if defined(STM32G4)
500+
501+
#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOSwitchBooster
502+
#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOSwitchBooster
503+
#define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD
504+
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
505+
#endif /* STM32G4 */
490506
/**
491507
* @}
492508
*/
@@ -495,7 +511,7 @@
495511
/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
496512
* @{
497513
*/
498-
#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7)
514+
#if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
499515
#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
500516
#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
501517
#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
@@ -554,12 +570,12 @@
554570
#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
555571
#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
556572

557-
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32H7)
573+
#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7)
558574
#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
559575
#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
560576
#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
561577
#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
562-
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32H7*/
578+
#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7*/
563579

564580
#if defined(STM32L1)
565581
#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
@@ -600,6 +616,13 @@
600616
#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
601617
#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
602618
#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
619+
620+
#if defined(STM32G4)
621+
#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
622+
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
623+
#define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable
624+
#define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset
625+
#endif /* STM32G4 */
603626
/**
604627
* @}
605628
*/
@@ -739,6 +762,12 @@
739762
#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
740763
#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
741764

765+
#if defined(STM32L1) || defined(STM32L4)
766+
#define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID
767+
#define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID
768+
#endif
769+
770+
742771
/**
743772
* @}
744773
*/
@@ -754,7 +783,6 @@
754783

755784
#define I2S_FLAG_TXE I2S_FLAG_TXP
756785
#define I2S_FLAG_RXNE I2S_FLAG_RXP
757-
#define I2S_FLAG_FRE I2S_FLAG_TIFRE
758786
#endif
759787

760788
#if defined(STM32F7)
@@ -972,6 +1000,24 @@
9721000
#define IS_TIM_HALL_INTERFACE_INSTANCE IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
9731001
#endif
9741002

1003+
#if defined(STM32H7)
1004+
#define TIM_TIM1_ETR_COMP1_OUT TIM_TIM1_ETR_COMP1
1005+
#define TIM_TIM1_ETR_COMP2_OUT TIM_TIM1_ETR_COMP2
1006+
#define TIM_TIM8_ETR_COMP1_OUT TIM_TIM8_ETR_COMP1
1007+
#define TIM_TIM8_ETR_COMP2_OUT TIM_TIM8_ETR_COMP2
1008+
#define TIM_TIM2_ETR_COMP1_OUT TIM_TIM2_ETR_COMP1
1009+
#define TIM_TIM2_ETR_COMP2_OUT TIM_TIM2_ETR_COMP2
1010+
#define TIM_TIM3_ETR_COMP1_OUT TIM_TIM3_ETR_COMP1
1011+
#define TIM_TIM1_TI1_COMP1_OUT TIM_TIM1_TI1_COMP1
1012+
#define TIM_TIM8_TI1_COMP2_OUT TIM_TIM8_TI1_COMP2
1013+
#define TIM_TIM2_TI4_COMP1_OUT TIM_TIM2_TI4_COMP1
1014+
#define TIM_TIM2_TI4_COMP2_OUT TIM_TIM2_TI4_COMP2
1015+
#define TIM_TIM2_TI4_COMP1COMP2_OUT TIM_TIM2_TI4_COMP1_COMP2
1016+
#define TIM_TIM3_TI1_COMP1_OUT TIM_TIM3_TI1_COMP1
1017+
#define TIM_TIM3_TI1_COMP2_OUT TIM_TIM3_TI1_COMP2
1018+
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
1019+
#endif
1020+
9751021
/**
9761022
* @}
9771023
*/
@@ -1251,7 +1297,7 @@
12511297

12521298
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
12531299

1254-
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7)
1300+
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4)
12551301
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
12561302
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
12571303
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
@@ -1260,7 +1306,7 @@
12601306
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
12611307
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
12621308
#define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
1263-
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 */
1309+
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 */
12641310

12651311
#if defined(STM32F4)
12661312
#define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT
@@ -2477,12 +2523,28 @@
24772523
#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
24782524
#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
24792525
#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
2526+
2527+
#if defined(STM32H7)
2528+
#define __HAL_RCC_WWDG_CLK_DISABLE __HAL_RCC_WWDG1_CLK_DISABLE
2529+
#define __HAL_RCC_WWDG_CLK_ENABLE __HAL_RCC_WWDG1_CLK_ENABLE
2530+
#define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE
2531+
#define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE
2532+
2533+
#define __HAL_RCC_WWDG_FORCE_RESET ((void)0U) /* Not available on the STM32H7*/
2534+
#define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/
2535+
2536+
2537+
#define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED
2538+
#define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED
2539+
#endif
2540+
24802541
#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
24812542
#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
24822543
#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
24832544
#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
24842545
#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
24852546
#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
2547+
24862548
#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
24872549
#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
24882550
#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
@@ -2815,6 +2877,15 @@
28152877
#define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED
28162878
#define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED
28172879

2880+
#if defined(STM32L1)
2881+
#define __HAL_RCC_CRYP_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
2882+
#define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
2883+
#define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
2884+
#define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
2885+
#define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
2886+
#define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
2887+
#endif /* STM32L1 */
2888+
28182889
#if defined(STM32F4)
28192890
#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
28202891
#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
@@ -2931,7 +3002,7 @@
29313002

29323003
#if defined(STM32L4)
29333004
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
2934-
#elif defined(STM32WB) || defined(STM32G0)
3005+
#elif defined(STM32WB) || defined(STM32G0) || defined(STM32G4)
29353006
#else
29363007
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
29373008
#endif
@@ -3059,7 +3130,7 @@
30593130
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
30603131
* @{
30613132
*/
3062-
#if defined (STM32G0) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined STM32L4Q5xx
3133+
#if defined (STM32G0) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32G4)
30633134
#else
30643135
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
30653136
#endif
@@ -3175,7 +3246,7 @@
31753246
#define SDIO_IRQHandler SDMMC1_IRQHandler
31763247
#endif
31773248

3178-
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2)
3249+
#if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4)
31793250
#define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef
31803251
#define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef
31813252
#define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef
@@ -3422,7 +3493,7 @@
34223493
/** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose
34233494
* @{
34243495
*/
3425-
#if defined (STM32H7) || defined (STM32F3)
3496+
#if defined (STM32H7) || defined (STM32G4) || defined (STM32F3)
34263497
#define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT
34273498
#define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA
34283499
#define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart
@@ -3434,6 +3505,16 @@
34343505
* @}
34353506
*/
34363507

3508+
/** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
3509+
* @{
3510+
*/
3511+
#if defined (STM32L4)
3512+
#define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
3513+
#endif
3514+
/**
3515+
* @}
3516+
*/
3517+
34373518
/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
34383519
* @{
34393520
*/

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_comp.h

Lines changed: 18 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -38,13 +38,13 @@ extern "C" {
3838
* @{
3939
*/
4040

41-
/* Exported types ------------------------------------------------------------*/
41+
/* Exported types ------------------------------------------------------------*/
4242
/** @defgroup COMP_Exported_Types COMP Exported Types
4343
* @{
4444
*/
4545

46-
/**
47-
* @brief COMP Init structure definition
46+
/**
47+
* @brief COMP Init structure definition
4848
*/
4949
typedef struct
5050
{
@@ -77,7 +77,7 @@ typedef struct
7777
uint32_t TriggerMode; /*!< Set the comparator output triggering External Interrupt Line (EXTI).
7878
This parameter can be a value of @ref COMP_EXTI_TriggerMode */
7979

80-
}COMP_InitTypeDef;
80+
} COMP_InitTypeDef;
8181

8282
/**
8383
* @brief HAL COMP state machine: HAL COMP states definition
@@ -91,9 +91,9 @@ typedef enum
9191
HAL_COMP_STATE_READY_LOCKED = (HAL_COMP_STATE_READY | COMP_STATE_BITFIELD_LOCK), /*!< COMP initialized but configuration is locked */
9292
HAL_COMP_STATE_BUSY = 0x02U, /*!< COMP is running */
9393
HAL_COMP_STATE_BUSY_LOCKED = (HAL_COMP_STATE_BUSY | COMP_STATE_BITFIELD_LOCK) /*!< COMP is running and configuration is locked */
94-
}HAL_COMP_StateTypeDef;
94+
} HAL_COMP_StateTypeDef;
9595

96-
/**
96+
/**
9797
* @brief COMP Handle Structure definition
9898
*/
9999
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
@@ -282,10 +282,10 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
282282
* @retval None
283283
*/
284284
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
285-
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) do{ \
286-
(__HANDLE__)->State = HAL_COMP_STATE_RESET; \
287-
(__HANDLE__)->MspInitCallback = NULL; \
288-
(__HANDLE__)->MspDeInitCallback = NULL; \
285+
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) do{ \
286+
(__HANDLE__)->State = HAL_COMP_STATE_RESET; \
287+
(__HANDLE__)->MspInitCallback = NULL; \
288+
(__HANDLE__)->MspDeInitCallback = NULL; \
289289
} while(0)
290290
#else
291291
#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET)
@@ -296,7 +296,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
296296
* @param __HANDLE__ COMP handle
297297
* @retval None
298298
*/
299-
#define COMP_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_COMP_ERROR_NONE)
299+
#define COMP_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_COMP_ERROR_NONE)
300300

301301
/**
302302
* @brief Enable the specified comparator.
@@ -374,7 +374,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
374374
/**
375375
* @brief Disable the COMP1 EXTI line rising & falling edge trigger.
376376
* @retval None
377-
*/
377+
*/
378378
#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \
379379
LL_EXTI_DisableRisingTrig_0_31(COMP_EXTI_LINE_COMP1); \
380380
LL_EXTI_DisableFallingTrig_0_31(COMP_EXTI_LINE_COMP1); \
@@ -550,16 +550,16 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
550550
* @{
551551
*/
552552

553-
/** @defgroup COMP_GET_EXTI_LINE COMP private macros to get EXTI line associated with comparators
553+
/** @defgroup COMP_GET_EXTI_LINE COMP private macros to get EXTI line associated with comparators
554554
* @{
555555
*/
556556
/**
557557
* @brief Get the specified EXTI line for a comparator instance.
558558
* @param __INSTANCE__ specifies the COMP instance.
559559
* @retval value of @ref COMP_ExtiLine
560560
*/
561-
#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 \
562-
: COMP_EXTI_LINE_COMP2)
561+
#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 \
562+
: COMP_EXTI_LINE_COMP2)
563563
/**
564564
* @}
565565
*/
@@ -643,13 +643,14 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
643643

644644
/* Initialization and de-initialization functions **********************************/
645645
HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp);
646-
HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp);
646+
HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp);
647647
void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp);
648648
void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp);
649649

650650
#if (USE_HAL_COMP_REGISTER_CALLBACKS == 1)
651651
/* Callbacks Register/UnRegister functions ***********************************/
652-
HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID, pCOMP_CallbackTypeDef pCallback);
652+
HAL_StatusTypeDef HAL_COMP_RegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID,
653+
pCOMP_CallbackTypeDef pCallback);
653654
HAL_StatusTypeDef HAL_COMP_UnRegisterCallback(COMP_HandleTypeDef *hcomp, HAL_COMP_CallbackIDTypeDef CallbackID);
654655
#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */
655656
/**

0 commit comments

Comments
 (0)