Skip to content

Commit 3bf6fae

Browse files
fpistmfpistm
committed
Updated STM32L0xx CMSIS to v1.7.2
Included in STM32CubeL0 FW V1.10.0 Signed-off-by: Frederic.Pillon <[email protected]>
1 parent 606090d commit 3bf6fae

37 files changed

+9
-74
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l011xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l011xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l011xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l021xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l021xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l021xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l031xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l031xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l031xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l041xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l041xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l041xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l051xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l051xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l051xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l052xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l052xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l052xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l053xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l053xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l053xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l061xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l061xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l061xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l062xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l062xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l062xx devices.

‎system/Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l063xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,6 @@
22
******************************************************************************
33
* @file stm32l063xx.h
44
* @author MCD Application Team
5-
* @version V1.7.1
6-
* @date 25-November-2016
75
* @brief CMSIS Cortex-M0+ Device Peripheral Access Layer Header File.
86
* This file contains all the peripheral register's definitions, bits
97
* definitions and memory mapping for stm32l063xx devices.

0 commit comments

Comments
 (0)