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| 1 | +/** |
| 2 | + ****************************************************************************** |
| 3 | + * @file stm32u0xx.h |
| 4 | + * @author MCD Application Team |
| 5 | + * @brief CMSIS STM32U0xx Device Peripheral Access Layer Header File. |
| 6 | + * |
| 7 | + * The file is the unique include file that the application programmer |
| 8 | + * is using in the C source code, usually in main.c. This file contains: |
| 9 | + * - Configuration section that allows to select: |
| 10 | + * - The STM32U0xx device used in the target application |
| 11 | + * - To use or not the peripheral’s drivers in application code(i.e. |
| 12 | + * code will be based on direct access to peripheral’s registers |
| 13 | + * rather than drivers API), this option is controlled by |
| 14 | + * "#define USE_HAL_DRIVER" |
| 15 | + * |
| 16 | + ****************************************************************************** |
| 17 | + * @attention |
| 18 | + * |
| 19 | + * Copyright (c) 2023 STMicroelectronics. |
| 20 | + * All rights reserved. |
| 21 | + * |
| 22 | + * This software is licensed under terms that can be found in the LICENSE file |
| 23 | + * in the root directory of this software component. |
| 24 | + * If no LICENSE file comes with this software, it is provided AS-IS. |
| 25 | + * |
| 26 | + ****************************************************************************** |
| 27 | + */ |
| 28 | + |
| 29 | +/** @addtogroup CMSIS |
| 30 | + * @{ |
| 31 | + */ |
| 32 | + |
| 33 | +/** @addtogroup stm32u0xx |
| 34 | + * @{ |
| 35 | + */ |
| 36 | + |
| 37 | +#ifndef __STM32U0xx_H |
| 38 | +#define __STM32U0xx_H |
| 39 | + |
| 40 | +#ifdef __cplusplus |
| 41 | + extern "C" { |
| 42 | +#endif /* __cplusplus */ |
| 43 | + |
| 44 | +/** @addtogroup Library_configuration_section |
| 45 | + * @{ |
| 46 | + */ |
| 47 | + |
| 48 | +/** |
| 49 | + * @brief STM32 Family |
| 50 | + */ |
| 51 | +#if !defined (STM32U0) |
| 52 | +#define STM32U0 |
| 53 | +#endif /* STM32U0 */ |
| 54 | + |
| 55 | +/* Uncomment the line below according to the target STM32U0 device used in your |
| 56 | + application |
| 57 | + */ |
| 58 | + |
| 59 | +#if !defined (STM32U073xx) && !defined (STM32U083xx) && !defined (STM32U031xx) |
| 60 | + /* #define STM32U083xx */ /*!< STM32U083xx Devices */ |
| 61 | + /* #define STM32U073xx */ /*!< STM32U073xx Devices */ |
| 62 | + /* #define STM32U031xx */ /*!< STM32U031xx Devices */ |
| 63 | +#endif |
| 64 | + |
| 65 | + |
| 66 | +/* Tip: To avoid modifying this file each time you need to switch between these |
| 67 | + devices, you can define the device in your toolchain compiler preprocessor. |
| 68 | + */ |
| 69 | +#if !defined (USE_HAL_DRIVER) |
| 70 | +/** |
| 71 | + * @brief Comment the line below if you will not use the peripherals drivers. |
| 72 | + In this case, these drivers will not be included and the application code will |
| 73 | + be based on direct access to peripherals registers |
| 74 | + */ |
| 75 | + /*#define USE_HAL_DRIVER */ |
| 76 | +#endif /* USE_HAL_DRIVER */ |
| 77 | + |
| 78 | +/** |
| 79 | + * @brief CMSIS Device version number 1.0.0 |
| 80 | + */ |
| 81 | +#define __STM32U0_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */ |
| 82 | +#define __STM32U0_CMSIS_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */ |
| 83 | +#define __STM32U0_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ |
| 84 | +#define __STM32U0_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ |
| 85 | +#define __STM32U0_CMSIS_VERSION ((__STM32U0_CMSIS_VERSION_MAIN << 24)\ |
| 86 | + |(__STM32U0_CMSIS_VERSION_SUB1 << 16)\ |
| 87 | + |(__STM32U0_CMSIS_VERSION_SUB2 << 8 )\ |
| 88 | + |(___STM32U0_CMSIS_VERSION_RC)) |
| 89 | + |
| 90 | +/** |
| 91 | + * @} |
| 92 | + */ |
| 93 | + |
| 94 | +/** @addtogroup Device_Included |
| 95 | + * @{ |
| 96 | + */ |
| 97 | + |
| 98 | +#if defined(STM32U073xx) |
| 99 | + #include "stm32u073xx.h" |
| 100 | +#elif defined(STM32U083xx) |
| 101 | + #include "stm32u083xx.h" |
| 102 | +#elif defined(STM32U031xx) |
| 103 | + #include "stm32u031xx.h" |
| 104 | +#else |
| 105 | + #error "Please select first the target STM32U0xx device used in your application (in stm32u0xx.h file)" |
| 106 | +#endif |
| 107 | + |
| 108 | +/** |
| 109 | + * @} |
| 110 | + */ |
| 111 | + |
| 112 | +/** @addtogroup Exported_types |
| 113 | + * @{ |
| 114 | + */ |
| 115 | +typedef enum |
| 116 | +{ |
| 117 | + RESET = 0, |
| 118 | + SET = !RESET |
| 119 | +} FlagStatus, ITStatus; |
| 120 | + |
| 121 | +typedef enum |
| 122 | +{ |
| 123 | + DISABLE = 0, |
| 124 | + ENABLE = !DISABLE |
| 125 | +} FunctionalState; |
| 126 | +#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) |
| 127 | + |
| 128 | +typedef enum |
| 129 | +{ |
| 130 | + ERROR = 0, |
| 131 | + SUCCESS = !ERROR |
| 132 | +} ErrorStatus; |
| 133 | + |
| 134 | +/** |
| 135 | + * @} |
| 136 | + */ |
| 137 | + |
| 138 | + |
| 139 | +/** @addtogroup Exported_macros |
| 140 | + * @{ |
| 141 | + */ |
| 142 | +#define SET_BIT(REG, BIT) ((REG) |= (BIT)) |
| 143 | + |
| 144 | +#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) |
| 145 | + |
| 146 | +#define READ_BIT(REG, BIT) ((REG) & (BIT)) |
| 147 | + |
| 148 | +#define CLEAR_REG(REG) ((REG) = (0x0)) |
| 149 | + |
| 150 | +#define WRITE_REG(REG, VAL) ((REG) = (VAL)) |
| 151 | + |
| 152 | +#define READ_REG(REG) ((REG)) |
| 153 | + |
| 154 | +#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) |
| 155 | + |
| 156 | +#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) |
| 157 | + |
| 158 | +/* Use of interrupt control for register exclusive access */ |
| 159 | +/* Atomic 32-bit register access macro to set one or several bits */ |
| 160 | +#define ATOMIC_SET_BIT(REG, BIT) \ |
| 161 | + do { \ |
| 162 | + uint32_t primask; \ |
| 163 | + primask = __get_PRIMASK(); \ |
| 164 | + __set_PRIMASK(1); \ |
| 165 | + SET_BIT((REG), (BIT)); \ |
| 166 | + __set_PRIMASK(primask); \ |
| 167 | + } while(0) |
| 168 | + |
| 169 | +/* Atomic 32-bit register access macro to clear one or several bits */ |
| 170 | +#define ATOMIC_CLEAR_BIT(REG, BIT) \ |
| 171 | + do { \ |
| 172 | + uint32_t primask; \ |
| 173 | + primask = __get_PRIMASK(); \ |
| 174 | + __set_PRIMASK(1); \ |
| 175 | + CLEAR_BIT((REG), (BIT)); \ |
| 176 | + __set_PRIMASK(primask); \ |
| 177 | + } while(0) |
| 178 | + |
| 179 | +/* Atomic 32-bit register access macro to clear and set one or several bits */ |
| 180 | +#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ |
| 181 | + do { \ |
| 182 | + uint32_t primask; \ |
| 183 | + primask = __get_PRIMASK(); \ |
| 184 | + __set_PRIMASK(1); \ |
| 185 | + MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \ |
| 186 | + __set_PRIMASK(primask); \ |
| 187 | + } while(0) |
| 188 | + |
| 189 | +/* Atomic 16-bit register access macro to set one or several bits */ |
| 190 | +#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT) \ |
| 191 | + |
| 192 | +/* Atomic 16-bit register access macro to clear one or several bits */ |
| 193 | +#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT) \ |
| 194 | + |
| 195 | +/* Atomic 16-bit register access macro to clear and set one or several bits */ |
| 196 | +#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ |
| 197 | + |
| 198 | +/** |
| 199 | + * @} |
| 200 | + */ |
| 201 | + |
| 202 | +#if defined (USE_HAL_DRIVER) |
| 203 | + #include "stm32u0xx_hal.h" |
| 204 | +#endif /* USE_HAL_DRIVER */ |
| 205 | + |
| 206 | +#ifdef __cplusplus |
| 207 | +} |
| 208 | +#endif /* __cplusplus */ |
| 209 | + |
| 210 | +#endif /* __STM32U0xx_H */ |
| 211 | +/** |
| 212 | + * @} |
| 213 | + */ |
| 214 | + |
| 215 | +/** |
| 216 | + * @} |
| 217 | + */ |
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