Skip to content

Commit d655fb0

Browse files
committed
fix AStyle
1 parent ca245c0 commit d655fb0

File tree

1 file changed

+63
-62
lines changed

1 file changed

+63
-62
lines changed

variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_GENERIC_NODE.cpp

Lines changed: 63 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -15,88 +15,89 @@
1515

1616
// Digital PinName array
1717
const PinName digitalPin[] = {
18-
PB_3, // D0/USR_BTN/SWO/RTS
19-
PA_15, // D1/BUZZER
20-
PA_2, // D2/TX
21-
PA_3, // D3/RX
22-
PA_11, // D4/SDA2/A1
23-
PA_12, // D5/SCL2/A2
24-
PA_13, // D6/A3/SWDIO
25-
PA_14, // D7/A4/SWCLK
26-
PA_0, // D8/FE_CTRL1
27-
PA_1, // D9/FE_CTRL2
28-
PA_4, // D10/CS1 FLASH
29-
PA_5, // D11/SCK1
30-
PA_6, // D12/MISO
31-
PA_7, // D13/MOSI
32-
PA_8, // D14/ACCEL_INT2
33-
PA_9, // D15/SCL1
34-
PA_10, // D16/SDA1
35-
PB_0, // D17/VDD_TCX0
36-
PB_2, // D18/VABAT_ADC/A0
37-
PB_4, // D19/VBAT_READ_EN
38-
PB_5, // D20/LED_RED
39-
PB_6, // D21/LED_GREEN
40-
PB_7, // D22/LED_BLUE
41-
PB_8, // D23/FE_CTRL3
42-
PB_12, // D24/LS2_FLASH_EN
43-
PC_13, // D25/LS1_SENSORS_EN
44-
PH_3 // D26/BOOT0
18+
PB_3, // D0/USR_BTN/SWO/RTS
19+
PA_15, // D1/BUZZER
20+
PA_2, // D2/TX
21+
PA_3, // D3/RX
22+
PA_11, // D4/SDA2/A1
23+
PA_12, // D5/SCL2/A2
24+
PA_13, // D6/A3/SWDIO
25+
PA_14, // D7/A4/SWCLK
26+
PA_0, // D8/FE_CTRL1
27+
PA_1, // D9/FE_CTRL2
28+
PA_4, // D10/CS1 FLASH
29+
PA_5, // D11/SCK1
30+
PA_6, // D12/MISO
31+
PA_7, // D13/MOSI
32+
PA_8, // D14/ACCEL_INT2
33+
PA_9, // D15/SCL1
34+
PA_10, // D16/SDA1
35+
PB_0, // D17/VDD_TCX0
36+
PB_2, // D18/VABAT_ADC/A0
37+
PB_4, // D19/VBAT_READ_EN
38+
PB_5, // D20/LED_RED
39+
PB_6, // D21/LED_GREEN
40+
PB_7, // D22/LED_BLUE
41+
PB_8, // D23/FE_CTRL3
42+
PB_12, // D24/LS2_FLASH_EN
43+
PC_13, // D25/LS1_SENSORS_EN
44+
PH_3 // D26/BOOT0
4545
};
4646

4747
// Analog (Ax) pin number array
4848
const uint32_t analogInputPin[] = {
49-
18, // A0, PB2
50-
4, // A1, PA11
51-
5, // A2, PA12
52-
6, // A3, PA13
53-
7, // A4, PA14
49+
18, // A0, PB2
50+
4, // A1, PA11
51+
5, // A2, PA12
52+
6, // A3, PA13
53+
7, // A4, PA14
5454
};
5555

5656
// ----------------------------------------------------------------------------
5757
#ifdef __cplusplus
58-
extern "C"
59-
{
58+
extern "C" {
6059
#endif
6160

62-
/**
61+
/**
6362
* @brief System Clock Configuration
6463
* @param None
6564
* @retval None
6665
*/
67-
WEAK void SystemClock_Config(void)
68-
{
69-
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
70-
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
66+
WEAK void SystemClock_Config(void)
67+
{
68+
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
69+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
7170

72-
/** Configure the main internal regulator output voltage
71+
/** Configure the main internal regulator output voltage
7372
*/
74-
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
75-
/** Initializes the CPU, AHB and APB busses clocks
73+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
74+
/** Initializes the CPU, AHB and APB busses clocks
7675
*/
77-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
78-
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
79-
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
80-
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
81-
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
82-
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
83-
{
84-
Error_Handler();
85-
}
86-
/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
76+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
77+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
78+
RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
79+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
80+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
81+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
82+
{
83+
Error_Handler();
84+
}
85+
/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
8786
*/
88-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3 | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
89-
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
90-
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
91-
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
92-
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
93-
RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
87+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK3|RCC_CLOCKTYPE_HCLK
88+
|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1
89+
|RCC_CLOCKTYPE_PCLK2;
90+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
91+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
92+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
93+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
94+
RCC_ClkInitStruct.AHBCLK3Divider = RCC_SYSCLK_DIV1;
9495

95-
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
96-
{
97-
Error_Handler();
98-
}
96+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
97+
{
98+
Error_Handler();
9999
}
100+
}
100101

101102
#ifdef __cplusplus
102103
}

0 commit comments

Comments
 (0)